EP2SGX130GF40C4NGB vs EP2SGX130GF40C4NES 비교

다음의 상세 나란히 비교: EP2SGX130GF40C4NGB 제조: Intel 및 EP2SGX130GF40C4NES 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EP2SGX130GF40C4NGB EP2SGX130GF40C4NES
브랜드 Intel Intel
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 Obsolete 최종 구매
재고 상태 In Stock In Stock
단가 (USD) $640.00 $1,380.00
Series Stratix II GX —
Family Enhanced Configuration (EPC) Devices Stratix II GX
Logic Elements 132,540 132,540
Logic Array Blocks (LABs) 6,627 —
User I/O Pins 734 734
패키지 1508-ball FBGA (GF40) —
Terminal Pitch 1.00 mm —
Speed Grade C4 C4 (speed grade -4)
Temperature Grade Commercial (0C to 85C) —
Transceivers Up to 20 multi-gigabit transceivers —
Max Transceiver Data Rate 6.375 Gbps —
PLLs 8 —
On-chip Memory TriMatrix memory (block RAM + distributed RAM) —
DSP Blocks Yes (embedded multipliers) Yes (variable, see datasheet)
Configuration Enhanced / EPC mode —
RoHS 상태 [DATA_NEEDED: RoHS status] —
Logic Blocks / ALMs — Approximately 53,000 ALMs
Process Technology — 90 nm CMOS
Core Voltage — 1.2 V
Maximum Transceiver Data Rate — 6.375 Gbps
Transceiver Channels — Up to 20 (4 to 20, device-dependent)
Total Package Pins — 1508 (FC-FBGA ball grid)
Package Code — GF40 (FC-FBGA, 40x40 mm, 1.0 mm pitch)
Internal Operating Frequency — Up to 717 MHz
Embedded Memory — Approximately 4.5 Mbits (TriMatrix)
PLL Blocks — 8
실장 유형 — Surface Mount (flip-chip BGA)
Lead-Free / RoHS — Yes (LEAD FREE per datasheet family code)
MSL 레벨 — Per JEDEC J-STD-020, typically MSL-4 or higher [DATA_NEEDED: exact MSL level]
동작 온도 — Commercial Extended (per N suffix)
JEDEC Standard Reference — MS-034AAU-1

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