EP910LC-25 vs EP910LC-35 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP910LC-25 sa pamamagitan ng Intel at EP910LC-35 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP910LC-25 EP910LC-35
Brand Intel Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Family Altera Classic EPLD Classic (EP910)
Macrocells 24 24
Logic Gates [DATA_NEEDED: logic gate count] —
Propagation Delay (tPD) 25 ns 35 ns
Dedicated Inputs 16 —
Packhaging 28-pin PLCC (LC suffix) PLCC-44 (J-lead, LC suffix)
Uri ng Pagpapasok Surface Mount —
Technology CMOS (EPROM-based) CMOS EPROM
Operating Voltage [DATA_NEEDED: VCC range] —
Temperature na Operasyon 0C to +70C (commercial) 0C to +70C (commercial)
Programmable Yes (EPROM, UV-erasable on windowed variants) —
I/O Pins [DATA_NEEDED: I/O count] —
Tindminan RoHS [DATA_NEEDED: RoHS status] Not applicable (legacy product)
Lead-Free [DATA_NEEDED: lead-free status] —
Maximum Frequency [DATA_NEEDED: fMAX] —
Product Type — EPLD (Erasable Programmable Logic Device)
Usable Gates — 450
Maximum Toggle Frequency — 28.6 MHz
Supply Voltage (VCC) — 5 V
Bilang ng Pin — 44
Programmable Flip-Flops — Yes (per macrocell)
Output Enable Control — Per macrocell
Erasure Method — UV (windowed) or OTP (plastic)

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