EPC2LC20ES vs EPC2LC20 Vergleich
Detaillierter Direktvergleich von EPC2LC20ES von Intel und EPC2LC20 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPC2LC20ES | EPC2LC20 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | Memory ICs | Memory ICs |
| Lebenszyklusstatus | Aktiv | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $5,85 | $7,20 |
| Speichertyp | Configuration PROM (Non-volatile) | Non-volatile configuration PROM |
| Speichergröße | 1.6 Mbit | 1.6 Mbit |
| Target Device | SRAM-based FPGAs and LUT devices | — |
| Schnittstelle | Serial (DCLK/DATA) with JTAG ISP | — |
| Operating Voltage | 3.3 V and 5.0 V tolerant | — |
| JTAG Standard | IEEE Std. 1149.1 compliant | — |
| In-System Programmability | Yes (via built-in JTAG) | — |
| Boundary-Scan Test (BST) | Built-in, IEEE 1149.1 compliant | — |
| Configuration Modes | Serial and parallel supported | — |
| Gehäuse | 20-PLCC (J-lead, 9x9 mm) | 20-pin PLCC (J-lead, 9x9 mm) |
| Montageart | Surface Mount / Through-Hole (PLCC socket) | Surface Mount |
| Pin-Anzahl | 20 | — |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | -40C to +85C (industrial) [DATA_NEEDED: exact grade from datasheet] |
| RoHS-Status | Compliant (ES suffix denotes lead-free industrial) | Non-Compliant (original Altera Pb-containing part) |
| Programming Interface | JTAG (4-wire: TDI/TDO/TMS/TCK) | IEEE 1149.1 (JTAG) ISP, 5.0-V and 3.3-V tolerant |
| Manufacturer | Intel (formerly Altera) | — |
| Configuration Interface | — | Serial (x1) to FPGA via DCLK/nCONFIG/nSTATUS/CONF_DONE |
| Supply Voltage VCC | — | 3.0 V to 3.6 V (3.3-V operation) |
| ISP Voltage Range | — | 5.0 V or 3.3 V |
| Supported FPGA Families | — | ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, MAX 9000 |
| Cascade Support | — | Yes - daisy-chain multiple EPC2 devices via JTAG for larger bitstreams |
| Lead-Free Version | — | EPC2LC20N available as lead-free equivalent |
| Programming Support | — | Altera Programming Unit (APU), Quartus II, JTAG programmer |
| Boundary-Scan | — | IEEE 1149.1 compliant, 8-bit or 16-bit JTAG |