EPC2LC20ES vs EPC2LC20 Comparación
Comparación detallada lado a lado de EPC2LC20ES por Intel y EPC2LC20 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPC2LC20ES | EPC2LC20 |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | Memory ICs | Memory ICs |
| Estado del ciclo de vida | Activo | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $5,85 | $7,20 |
| Tipo de memoria | Configuration PROM (Non-volatile) | Non-volatile configuration PROM |
| Tamaño de memoria | 1.6 Mbit | 1.6 Mbit |
| Target Device | SRAM-based FPGAs and LUT devices | — |
| Interfaz | Serial (DCLK/DATA) with JTAG ISP | — |
| Operating Voltage | 3.3 V and 5.0 V tolerant | — |
| JTAG Standard | IEEE Std. 1149.1 compliant | — |
| In-System Programmability | Yes (via built-in JTAG) | — |
| Boundary-Scan Test (BST) | Built-in, IEEE 1149.1 compliant | — |
| Configuration Modes | Serial and parallel supported | — |
| Encapsulado | 20-PLCC (J-lead, 9x9 mm) | 20-pin PLCC (J-lead, 9x9 mm) |
| Tipo de montaje | Surface Mount / Through-Hole (PLCC socket) | Surface Mount |
| Recuento de pines | 20 | — |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | -40C to +85C (industrial) [DATA_NEEDED: exact grade from datasheet] |
| Estado RoHS | Compliant (ES suffix denotes lead-free industrial) | Non-Compliant (original Altera Pb-containing part) |
| Programming Interface | JTAG (4-wire: TDI/TDO/TMS/TCK) | IEEE 1149.1 (JTAG) ISP, 5.0-V and 3.3-V tolerant |
| Manufacturer | Intel (formerly Altera) | — |
| Configuration Interface | — | Serial (x1) to FPGA via DCLK/nCONFIG/nSTATUS/CONF_DONE |
| Supply Voltage VCC | — | 3.0 V to 3.6 V (3.3-V operation) |
| ISP Voltage Range | — | 5.0 V or 3.3 V |
| Supported FPGA Families | — | ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, MAX 9000 |
| Cascade Support | — | Yes - daisy-chain multiple EPC2 devices via JTAG for larger bitstreams |
| Lead-Free Version | — | EPC2LC20N available as lead-free equivalent |
| Programming Support | — | Altera Programming Unit (APU), Quartus II, JTAG programmer |
| Boundary-Scan | — | IEEE 1149.1 compliant, 8-bit or 16-bit JTAG |