MRFG35010NR5 - 9W pHEMT RF Power FET 3.55GHz | NXP
Teilenummer: MRFG35010NR5 ✗ Abgekündigt| Menge | Stückpreis | Gesamt |
|---|---|---|
| 1 | $18.5 | $18,50 |
| 10 | $16.2 | $162,00 |
| 100 | $13.85 | $1.385,00 |
| 500 | $11.4 | $5.700,00 |
| 1.000 | $9.6 | $9.600,00 |
MRFG35010NR5 Übersicht
An RF power FET is a specialized field-effect transistor optimized for efficient amplification of high-frequency signals in the hundreds-of-megahertz to multi-gigahertz range. Unlike general-purpose MOSFETs, RF power FETs use GaAs pHEMT process technology to deliver high gain, low parasitic capacitance, and high breakdown voltage simultaneously, which are essential for linear power amplification in base-station and broadband wireless equipment. The MRFG35010NR5 sits inside the discrete RF amplifier hierarchy between small-signal GaAs transistors and full MMIC power amplifier modules.
Key specifications include 10 dB typical power gain at 3.55 GHz, 9 W CW output power capability, 15 V maximum drain-source voltage rating, and a small PLD-1.5 over-molded plastic surface-mount package that simplifies board-level assembly compared to traditional ceramic flanged parts. The device is unmatched, giving the designer freedom to apply target-specific input/output matching networks for Class AB linear operation.
The pHEMT GaAs process gives the MRFG35010NR5 its headline mix of high breakdown voltage, high gain per stage, and good thermal stability. Because it is targeted at the 3.3-3.6 GHz driver segment, the bias network and matching topology reference the typical application circuits published in the NXP datasheet, which recommend low-loss microstrip matching on a low-dielectric substrate with proper RF bypassing at the bias feed.
Typical applications include 3.5 GHz WLL/MMDS/BWA driver amplifiers, UMTS base-station driver stages, and broadband wireless access transmitters. As a driver-stage part it is normally preceded by a smaller pHEMT gain block and followed by a higher-power final-stage FET, with inter-stage matching networks designed for flat gain and acceptable IMD3/IMD5 in the operating band.
When designing with this device, thermal management is critical because the PLD-1.5 package has limited dissipation headroom at full 9 W output. Provide a solid ground plane with multiple thermal vias under the package footprint and follow the NXP recommended bias sequence to avoid stressing the die during turn-on.
This page synthesizes distributor pricing, drop-in and equivalent options, and practical design notes not found in the manufacturer datasheet.
Drop-in-Alternativen für MRFG35010NR5 – gleiches Gehäuse, Pin-kompatibel. Bauteile mit anderem Gehäuse, die eine PCB-Überarbeitung erfordern, sind ausgeschlossen.
Varianten dieser Serie
Modelle derselben Serie, die drop-in-kompatibel sind mit MRFG35010NR5 (gleiche Bauform und Footprint) – abweichend in Configuration, Current Rating, Mounting Type.
Schnellvergleichstool – Wählen Sie Alternativbauteile für den Direktvergleich:
MRFG35015NR5
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
MRFG35010N
✅ Drop-In ⚠️ Spezifikationen ungeprüft📋 Referenzalternative (nicht im Katalog)
MRFG35010NR5
✅ Drop-In✓ Auf Lager
$9.6 / Stück
Datenblatt ansehen →MRFG35020NR5
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
MRFG35010NR5 Grenzwerte & elektrische Eigenschaften
| Transistortyp | pHEMT FET |
| Technology | GaAs pHEMT |
| Frequency | 3.55 GHz |
| Operating Frequency Range | Up to 3.6 GHz |
| Gain | 10 dB (typical at 3.55 GHz) |
| Output Power (CW) | 9 W |
| Voltage - Rated | 15 V |
| Voltage - Test | 12 V |
| Current - Test | 180 mA |
| Current Rating | 2.9 A |
| Gehäuse / Bauform | PLD-1.5 |
| Supplier Device Package | PLD-1.5 |
| Montageart | Surface Mount |
| Configuration | Single, unmatched |
| Application | WLL/MMDS/BWA/UMTS driver stages |
MRFG35010NR5 pld-1.5 Pinbelegungsleitfaden
Pinbelegung für MRFG35010NR5 (pld-1.5-Gehäuse). Dieses Leistungsbauteil verfügt über Gate-, Drain- und Source-Anschlüsse. Bei nicht gepolten Gehäusen entnehmen Sie die genaue Ausrichtung von Pin 1 und Footprint-Details dem Herstellerdatenblatt. Typische Anwendungen sind Netzteilentwurf, Motoransteuerung und Lastschaltung.
Keine detaillierten Pinbelegungsdaten verfügbar für MRFG35010NR5.
Siehe die Datenblatt für die vollständige Pin-Konfiguration.
MRFG35010NR5 Sicherer Arbeitsbereich (estimated from datasheet limits)
Typische Anwendungen
MRFG35010NR5 ist geeignet für 6 Anwendungs: 3.5 GHz WLL/MMDS Driver Amplifier, UMTS Base-Station Driver Stage, Broadband Wireless Access (BWA) Transmitter, Point-to-Point Radio Driver, RF Test & Measurement Driver, Industrial / Scientific 3.5 GHz Driver.
3.5 GHz WLL/MMDS Driver Amplifier
The MRFG35010NR5 is purpose-built for 3.3-3.6 GHz WLL (Wireless Local Loop) and MMDS (Multichannel Multipoint Distribution Service) driver stages, where 9 W of CW output power at 10 dB gain provides the right drive level for a downstream higher-power final-stage FET. The NXP datasheet specifies the part at 12 V / 180 mA quiescent, with unmatched input/output that lets the designer optimize the matching network for the exact channel plan. The PLD-1.5 plastic surface-mount package keeps the board footprint small while still dissipating the 9 W power level, and the GaAs pHEMT process delivers the breakdown voltage headroom needed for these broadband wireless access services.
Empfohlen
UMTS Base-Station Driver Stage
In UMTS (Universal Mobile Telecommunications System) base-station lineups, the MRFG35010NR5 serves as a driver between the small-signal gain block and the final power FET, providing 9 W of linear drive in the 3.5 GHz band. Its 10 dB typical gain at 3.55 GHz means the upstream gain block only needs to deliver milliwatts of drive, simplifying the front-end bias chain. Operating from a 12 V rail with 180 mA quiescent bias keeps the bias supply simple, and the unmatched GaAs pHEMT die allows the designer to tune the matching network for the specific UMTS channel bandwidth and linearity target.
Empfohlen
Broadband Wireless Access (BWA) Transmitter
BWA (Broadband Wireless Access) systems operating in the 3.3-3.6 GHz band use the MRFG35010NR5 as a driver-stage amplifier that combines 9 W CW output power with 10 dB gain and the linearity needed for multi-carrier OFDM signals. The GaAs pHEMT process delivers the intermodulation performance required for these broadband modulation schemes when the device is biased in Class AB. The PLD-1.5 plastic package makes the part suitable for high-volume surface-mount assembly lines, and the unmatched I/O gives designers flexibility to optimize for the deployed channel bandwidth and spectral mask.
Empfohlen
Point-to-Point Radio Driver
Point-to-point microwave links in the 3.5 GHz band use the MRFG35010NR5 as a driver stage for the final power amplifier, taking advantage of its 9 W output capability and 10 dB gain to set the link's linearity and error-vector magnitude budget. The 12 V supply rail is convenient for outdoor radio units that already have a 12 V or 24 V bus, and the unmatched GaAs pHEMT die allows the designer to optimize return loss across the operating channel. Thermal performance is key in outdoor enclosures, and the PLD-1.5 package pairs with a copper ground pour and via array for steady-state heat removal.
Empfohlen
RF Test & Measurement Driver
In RF test and measurement setups, the MRFG35010NR5 is used as a 9 W driver for bench amplifiers, gain-block cascades, and ATE stimulus chains operating in the 3.3-3.6 GHz band. Its unmatched I/O lets the lab engineer optimize gain flatness across the test channel, and the 12 V / 180 mA bias point is simple to set up with bench supplies. The PLD-1.5 surface-mount package is convenient for prototyping on microstrip test fixtures, and the documented 10 dB typical gain at 3.55 GHz provides a predictable starting point for cascade-budget calculations.
Empfohlen
Industrial / Scientific 3.5 GHz Driver
Industrial and scientific systems that use the 3.3-3.6 GHz band (such as radar front-ends, spectroscopy drives, and ISM-adjacent telemetry links) can use the MRFG35010NR5 as a robust driver stage. The GaAs pHEMT die handles the thermal cycling of industrial environments when mounted to a properly designed copper ground with via array. Its 9 W output capability and 10 dB gain make it well-suited to driving higher-power final stages or antennas in these non-telecom deployments, while the unmatched I/O gives the industrial RF designer freedom to optimize the matching network for the specific sensor or radiator.
Empfohlen
Zusammenfassung der empfohlenen Produkte
Technische Referenzdaten für MRFG35010NR5 – Vergleich, Designhinweise und Compliance-Informationen.
Auswahlhilfe
Vergleich mit Alternativen
| Parameter | Dieses Produkt | MRFG35015NR5 | MRFG35010N | MRFG35020NR5 |
|---|---|---|---|---|
| Brand | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors |
| Package | PLD-1.5 | PLD-1.5 - same | PLD-1.5 - same | PLD-1.5 - same |
| Output Power (CW) | 9 W | 15 W | 9 W | 20 W |
| Gain at 3.55 GHz | 10 dB | 10 dB | 10 dB | 9-10 dB |
| Voltage - Rated | 15 V | 15 V | 15 V | 15 V |
| Test Voltage | 12 V | 12 V | 12 V | 12 V |
| Quiescent Current (Test) | 180 mA | 180 mA | 180 mA | Higher (per datasheet) |
| Matched / Unmatched | Unmatched | Unmatched | Unmatched | Unmatched |
Wichtigste Unterscheidungsmerkmale
- Higher CW output headroom with same PLD-1.5 footprint (vs. MRFG35015NR5)
- Same die, same package - direct cross-reference with the tray variant (vs. MRFG35010N)
- Higher-output alternative in the same package family (vs. MRFG35020NR5)
Designhinweise
Estimated: At 9 W CW output and roughly 35% DC-to-RF efficiency, the MRFG35010NR5 dissipates on the order of 17 W of heat in the PLD-1.5 plastic package. Provide at least 2 oz copper ground pour under the package with a thermal via array (0.3 mm vias, 1 mm pitch) tied to a large inner-plane copper area. Without this, junction temperature will exceed the rated limit under CW operation at full power.
Estimated: Use a low-loss RF substrate such as Rogers RO4003C with 8-10 mil dielectric for the matching network traces. Keep the gate and drain bond-wire or ribbon interconnects as short as possible (under 1 mm) to minimize parasitic inductance that would detune the 3.55 GHz match. Place RF bypass capacitors (100 pF and 10 nF in parallel) within 2 mm of the bias feed to prevent low-frequency instability.
Do not exceed the 15 V drain-source voltage rating or the 2.9 A current rating even transiently; the GaAs die is sensitive to avalanche and ESD. Always gate-bias the part before applying drain voltage (standard GaAs FET sequence) to avoid spurious oscillation or die stress. Confirm the bias supply has adequate decoupling to prevent low-frequency bias-tee oscillations that can destroy the die.
Recommended: Use a continuous ground plane on layer 2 with stitched vias around all RF trace edges to suppress unwanted parallel-plate and surface-wave modes at 3.55 GHz. Separate the input and output matching networks with a metal or grounded coplanar shield to prevent feedback oscillation. Match the device in the actual operating frequency sub-band rather than at the headline 3.55 GHz if your channel is offset.
Compliance-Informationen
RoHS and lead-free status were not present in the verified web data for this part and are recorded as [DATA_NEEDED] in the specs array. RF power FETs are not typically qualified to AEC-Q100.
