TPS6594-Q1 - 5 BUCK 4 LDO ASIL-D PMIC | TI | ADAS
Teilenummer: TPS6594-Q1 ✓ Aktiv| Menge | Stückpreis | Gesamt |
|---|---|---|
| 1 | $9.8 | $9,80 |
| 10 | $8.85 | $88,50 |
| 100 | $7.6 | $760,00 |
| 500 | $6.7 | $3.350,00 |
| 1.000 | $5.95 | $5.950,00 |
TPS6594-Q1 Übersicht
A PMIC is a highly integrated circuit that manages the power requirements of a host processor, combining multiple DC-DC step-down converters, LDOs, and control logic into a single device. In the power-management hierarchy, a PMIC sits above individual voltage regulators, adding coordinated sequencing, monitoring, and protection. The TPS6594-Q1 supports ASIL-D functional safety development per ISO 26262, making it critical in ADAS and infotainment platforms.
Key features include multi-phase BUCK configuration for high-current core rails, integrated LDOs for noise-sensitive analog supplies, and extensive diagnostics: input supply voltage monitoring, input over-voltage protection, voltage monitoring on all BUCK and LDO outputs, register and interface CRC, current-limit, short-circuit protection, thermal pre-warning, and over-temperature shutdown. Dynamic voltage scaling (DVS) and configurable power-up sequencing are set via factory-programmed NVM memory.
Technically, the TPS6594-Q1 uses one-time programmable NVM to set default voltages, sequences, and fault handling, allowing one hardware design to support multiple processor platforms through different orderable part numbers such as TPS65941111RWERQ1. Multi-phase BUCKs can be combined for higher currents, and the device communicates via I2C or SPI for real-time control. It also includes a 32-kHz crystal oscillator feeding an integrated RTC module with backup-battery management from a coin cell or super-capacitor.
Typical applications include ADAS domain controllers, digital cockpit systems, and gateway modules, powering DRA829V and TDA4VM (Jacinto 7) processors with all necessary rails, proper sequencing, and per-rail monitoring.
When designing with the TPS6594-Q1, pay close attention to the NVM configuration since it defines default behavior. Use the TI Power Configurator tool and ensure adequate PCB thermal layout when multiple BUCKs operate at high currents.
Drop-in-Alternativen für TPS6594-Q1 – gleiches Gehäuse, Pin-kompatibel. Bauteile mit anderem Gehäuse, die eine PCB-Überarbeitung erfordern, sind ausgeschlossen.
Schnellvergleichstool – Wählen Sie Alternativbauteile für den Direktvergleich:
TPS65941111RWERQ1
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
TPS65941213RWERQ1
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
TPS6594141BRWERQ1
✅ Drop-In📋 Referenzalternative (nicht im Katalog)
TPS6593-Q1
⚡ Gleiches Gehäuse📋 Referenzalternative (nicht im Katalog)
LP8764-Q1
⚡ Gleiches Gehäuse📋 Referenzalternative (nicht im Katalog)
TPS6594-Q1 Grenzwerte & elektrische Eigenschaften
| Topologie | PMIC: 5 BUCKs + 4 LDOs |
| BUCK Configuration | 4x multi-phase configurable BUCK + 1x BUCK |
| BUCK Output Current | 3.5 A per phase (BUCK1-4); 2 A (BUCK5) |
| Safety Compliance | ASIL-D capable per ISO 26262 |
| Gehäuse | 56-VQFNP (8x8 mm) |
| Interfaces | I2C, SPI with CRC |
| RTC | Integrated RTC with 32-kHz crystal oscillator |
| Backup Battery Support | Coin cell or super-capacitor |
| Dynamic Voltage Scaling | Supported (DVS) |
| Configuration Memory | Factory-programmed NVM |
| Protection Features | OVP, current-limit, short-circuit, thermal shutdown |
| Diagnostics | Rail voltage monitoring, register/interface CRC, thermal pre-warning |
| Target Processors | DRA829V, TDA4VM (Jacinto 7) |
| Montageart | Surface Mount |
TPS6594-Q1 56-vqfnp (8x8 mm) Pinbelegungsleitfaden
Pinbelegung für TPS6594-Q1 (56-vqfnp (8x8 mm)-Gehäuse). Dieses Leistungsbauteil verfügt über Gate-, Drain- und Source-Anschlüsse. Bei nicht gepolten Gehäusen entnehmen Sie die genaue Ausrichtung von Pin 1 und Footprint-Details dem Herstellerdatenblatt. Typische Anwendungen sind Netzteilentwurf, Motoransteuerung und Lastschaltung.
Keine detaillierten Pinbelegungsdaten verfügbar für TPS6594-Q1.
Siehe die Datenblatt für die vollständige Pin-Konfiguration.
Typische Anwendungen
TPS6594-Q1 ist geeignet für 6 Anwendungs: ADAS Domain Controller, Digital Cockpit / Infotainment, Automotive Gateway Modules, Safety MCU / Processor Power, Automotive Networking / PHY Power, Robotics and Industrial Automation.
ADAS Domain Controller
The TPS6594-Q1 is the reference companion PMIC for TDA4VM (Jacinto 7) ADAS domain controllers, delivering the multi-rail power tree with 4x 3.5 A/phase multi-phase BUCKs for core rails and 2 A on BUCK5. Its ASIL-D ISO 26262 diagnostics - per-rail voltage monitoring, CRC on I2C/SPI, thermal pre-warning - provide the safety metrics camera, radar, and sensor-fusion controllers demand. Placed as the single power companion, it sequences all rails via factory NVM, and unlike discrete solutions it reports faults in real time over the safety interface.
Empfohlen
Digital Cockpit / Infotainment
For digital cockpit SoCs such as the DRA829V, the TPS6594-Q1 supplies the complete rail set: high-current multi-phase BUCKs for SoC cores, 2 A BUCK5 for memory rails, and four LDOs for noise-sensitive analog, audio, and PHY supplies. The integrated 32-kHz RTC with coin-cell backup preserves time-of-day across key-off. DVS support enables dynamic core-voltage scaling for thermal management during graphics-intensive workloads, while NVM-defined sequencing guarantees the exact power-up order the SoC requires at every ignition cycle.
Empfohlen
Automotive Gateway Modules
Vehicle gateways require always-on domains, wake-up capability, and functional safety diagnostics. The TPS6594-Q1 supports low-power and safety states via its state machine, powering gateway MCUs with LDO rails while the RTC backup domain runs from a super-capacitor or coin cell. Per-rail monitoring with CRC-protected SPI/I2C reporting gives the safety MCU continuous supply-integrity evidence needed for ASIL-D gateway functions such as secured CAN bridging and OTA update supervision in modern E/E architectures.
Empfohlen
Safety MCU / Processor Power
Safety-relevant MCUs such as the AM263x and F29x families need strictly sequenced, monitored rails. The TPS6594-Q1 provides the power companion function with factory-programmable NVM to match each MCU startup order, plus the diagnostic set (over-voltage protection, current-limit, short-circuit, thermal pre-warning and shutdown) needed to argue safety integrity in an ISO 26262 system. Its CRC-protected interfaces ensure configuration and status reads are themselves fault-detectable - a key requirement when the power supervisor is part of the safety path.
Empfohlen
Automotive Networking / PHY Power
The four integrated LDOs of the TPS6594-Q1 deliver low-noise rails for automotive Ethernet PHYs and CAN transceivers, where switching ripple on analog supplies degrades signaling margin. While the BUCKs carry processor core loads at up to 3.5 A per phase, LDO rails isolate noise-sensitive PHY blocks, and the PMIC fault reporting flags any rail excursion toward a gateway's safety supervisor. This mixed BUCK-plus-LDO topology avoids adding discrete linear regulators, saving board area in zonal controllers.
Empfohlen
Robotics and Industrial Automation
Industrial controllers derived from Jacinto 7 and AM6x platforms reuse the TPS6594-Q1 power reference design for deterministic multi-rail sequencing of processor, DDR, and analog supplies. The 56-VQFNP integration of 5 BUCKs and 4 LDOs replaces a multi-chip power solution, shrinking controller boards in mobile robots and factory automation hardware. Per-rail telemetry over I2C/SPI supports predictive-maintenance diagnostics, while short-circuit and thermal protection guard against stall-driven power faults common in actuator-driven systems.
Empfohlen
Zusammenfassung der empfohlenen Produkte
Technische Referenzdaten für TPS6594-Q1 – Vergleich, Designhinweise und Compliance-Informationen.
Auswahlhilfe
Vergleich mit Alternativen
| Parameter | Dieses Produkt | TPS65941111RWERQ1 | TPS6593-Q1 | LP8764-Q1 | TPS65224-Q1 |
|---|---|---|---|---|---|
| Package | 56-VQFNP (8x8 mm) | 56-VQFNP - same | 56-VQFNP - same | 56-VQFNP - same | VQFN-32 - different |
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Safety Capability | ASIL-D per ISO 26262 | ASIL-D | ASIL-D | ASIL-D | ASIL-B/D capable |
| NVM Configuration | Factory-programmed, variant-specific | Jacinto 7 pre-config | Variant-specific | Variant-specific | Variant-specific |
Wichtigste Unterscheidungsmerkmale
- Complete companion PMIC with RTC and backup power (vs. LP8764-Q1)
- Highest rail count with ASIL-D diagnostics in one package (vs. TPS65224-Q1)
- Platform-tailored NVM variants reduce rework (vs. TPS6593-Q1)
Designhinweise
The NVM configuration is the single largest integration risk: default voltages, sequencing, and GPIO behavior are factory-set per orderable variant (e.g., TPS65941111RWERQ1 vs TPS65941213RWERQ1). Selecting the wrong variant can mis-sequence a Jacinto 7 power-up and brown-out the SoC. Confirm NVM config against TI Power Configurator output and the processor power reference design before ordering.
With four multi-phase BUCKs at 3.5 A per phase plus a 2 A BUCK, total losses can reach several watts at high load. The 56-VQFNP exposed-pad package requires solid thermal vias to inner ground planes under the pad. Model worst-case dissipation with the TI Power Configurator efficiency estimates and verify junction temperature stays within limits per datasheet SLVSEA7.
Follow the TPS6594-Q1 user guide and Jacinto 7 power reference design (TPS6594-Q1 series EVM documentation) for BUCK placement: minimize loop area from input caps to BUCK pins, place output inductors and sense connections close, and route the safety I2C/SPI bus away from switching nodes to preserve signal integrity for the CRC-monitored safety interface.
Compliance-Informationen
Automotive grade -Q1 part (AEC-Q100 qualified per TI automotive qualification practice). RoHS/lead-free status per TI product page; REACH and halogen details not stated in provided data.
