TPS6594-Q1 - 5 BUCK 4 LDO ASIL-D PMIC | TI | ADAS
料号： TPS6594-Q1 ✓ 量产中| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $9.8 | $9.80 |
| 10 | $8.85 | $88.50 |
| 100 | $7.6 | $760.00 |
| 500 | $6.7 | $3,350.00 |
| 1,000 | $5.95 | $5,950.00 |
TPS6594-Q1 概述
A PMIC is a highly integrated circuit that manages the power requirements of a host processor, combining multiple DC-DC step-down converters, LDOs, and control logic into a single device. In the power-management hierarchy, a PMIC sits above individual voltage regulators, adding coordinated sequencing, monitoring, and protection. The TPS6594-Q1 supports ASIL-D functional safety development per ISO 26262, making it critical in ADAS and infotainment platforms.
Key features include multi-phase BUCK configuration for high-current core rails, integrated LDOs for noise-sensitive analog supplies, and extensive diagnostics: input supply voltage monitoring, input over-voltage protection, voltage monitoring on all BUCK and LDO outputs, register and interface CRC, current-limit, short-circuit protection, thermal pre-warning, and over-temperature shutdown. Dynamic voltage scaling (DVS) and configurable power-up sequencing are set via factory-programmed NVM memory.
Technically, the TPS6594-Q1 uses one-time programmable NVM to set default voltages, sequences, and fault handling, allowing one hardware design to support multiple processor platforms through different orderable part numbers such as TPS65941111RWERQ1. Multi-phase BUCKs can be combined for higher currents, and the device communicates via I2C or SPI for real-time control. It also includes a 32-kHz crystal oscillator feeding an integrated RTC module with backup-battery management from a coin cell or super-capacitor.
Typical applications include ADAS domain controllers, digital cockpit systems, and gateway modules, powering DRA829V and TDA4VM (Jacinto 7) processors with all necessary rails, proper sequencing, and per-rail monitoring.
When designing with the TPS6594-Q1, pay close attention to the NVM configuration since it defines default behavior. Use the TI Power Configurator tool and ensure adequate PCB thermal layout when multiple BUCKs operate at high currents.
直接替换替代料： TPS6594-Q1 ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
快速对比工具——选择替代料号进行并排对比：
TPS65941111RWERQ1
✅ 直接替换📋 参考替代料（不在目录中）
TPS65941213RWERQ1
✅ 直接替换📋 参考替代料（不在目录中）
TPS6594141BRWERQ1
✅ 直接替换📋 参考替代料（不在目录中）
TPS6593-Q1
⚡ 相同封装📋 参考替代料（不在目录中）
LP8764-Q1
⚡ 相同封装📋 参考替代料（不在目录中）
TPS6594-Q1 最大额定值与电气特性
| 拓扑 | PMIC: 5 BUCKs + 4 LDOs |
| BUCK Configuration | 4x multi-phase configurable BUCK + 1x BUCK |
| BUCK Output Current | 3.5 A per phase (BUCK1-4); 2 A (BUCK5) |
| Safety Compliance | ASIL-D capable per ISO 26262 |
| 封装 | 56-VQFNP (8x8 mm) |
| Interfaces | I2C, SPI with CRC |
| RTC | Integrated RTC with 32-kHz crystal oscillator |
| Backup Battery Support | Coin cell or super-capacitor |
| Dynamic Voltage Scaling | Supported (DVS) |
| Configuration Memory | Factory-programmed NVM |
| Protection Features | OVP, current-limit, short-circuit, thermal shutdown |
| Diagnostics | Rail voltage monitoring, register/interface CRC, thermal pre-warning |
| Target Processors | DRA829V, TDA4VM (Jacinto 7) |
| 安装类型 | Surface Mount |
TPS6594-Q1 56-vqfnp (8x8 mm) 引脚配置指南
TPS6594-Q1（56-vqfnp (8x8 mm) 封装）的引脚配置。 该功率器件具有栅极、漏极和源极端子。对于无极性封装，请参阅制造商数据手册以了解确切的引脚 1 方向和封装尺寸细节。常见应用包括电源设计、电机驱动和负载开关。
暂无详细引脚数据： TPS6594-Q1.
请参阅 数据手册 以查看完整引脚配置。
典型应用
TPS6594-Q1 适用于 6 应用s: ADAS Domain Controller, Digital Cockpit / Infotainment, Automotive Gateway Modules, Safety MCU / Processor Power, Automotive Networking / PHY Power, Robotics and Industrial Automation.
ADAS Domain Controller
The TPS6594-Q1 is the reference companion PMIC for TDA4VM (Jacinto 7) ADAS domain controllers, delivering the multi-rail power tree with 4x 3.5 A/phase multi-phase BUCKs for core rails and 2 A on BUCK5. Its ASIL-D ISO 26262 diagnostics - per-rail voltage monitoring, CRC on I2C/SPI, thermal pre-warning - provide the safety metrics camera, radar, and sensor-fusion controllers demand. Placed as the single power companion, it sequences all rails via factory NVM, and unlike discrete solutions it reports faults in real time over the safety interface.
推荐
Digital Cockpit / Infotainment
For digital cockpit SoCs such as the DRA829V, the TPS6594-Q1 supplies the complete rail set: high-current multi-phase BUCKs for SoC cores, 2 A BUCK5 for memory rails, and four LDOs for noise-sensitive analog, audio, and PHY supplies. The integrated 32-kHz RTC with coin-cell backup preserves time-of-day across key-off. DVS support enables dynamic core-voltage scaling for thermal management during graphics-intensive workloads, while NVM-defined sequencing guarantees the exact power-up order the SoC requires at every ignition cycle.
推荐
Automotive Gateway Modules
Vehicle gateways require always-on domains, wake-up capability, and functional safety diagnostics. The TPS6594-Q1 supports low-power and safety states via its state machine, powering gateway MCUs with LDO rails while the RTC backup domain runs from a super-capacitor or coin cell. Per-rail monitoring with CRC-protected SPI/I2C reporting gives the safety MCU continuous supply-integrity evidence needed for ASIL-D gateway functions such as secured CAN bridging and OTA update supervision in modern E/E architectures.
推荐
Safety MCU / Processor Power
Safety-relevant MCUs such as the AM263x and F29x families need strictly sequenced, monitored rails. The TPS6594-Q1 provides the power companion function with factory-programmable NVM to match each MCU startup order, plus the diagnostic set (over-voltage protection, current-limit, short-circuit, thermal pre-warning and shutdown) needed to argue safety integrity in an ISO 26262 system. Its CRC-protected interfaces ensure configuration and status reads are themselves fault-detectable - a key requirement when the power supervisor is part of the safety path.
推荐
Automotive Networking / PHY Power
The four integrated LDOs of the TPS6594-Q1 deliver low-noise rails for automotive Ethernet PHYs and CAN transceivers, where switching ripple on analog supplies degrades signaling margin. While the BUCKs carry processor core loads at up to 3.5 A per phase, LDO rails isolate noise-sensitive PHY blocks, and the PMIC fault reporting flags any rail excursion toward a gateway's safety supervisor. This mixed BUCK-plus-LDO topology avoids adding discrete linear regulators, saving board area in zonal controllers.
推荐
Robotics and Industrial Automation
Industrial controllers derived from Jacinto 7 and AM6x platforms reuse the TPS6594-Q1 power reference design for deterministic multi-rail sequencing of processor, DDR, and analog supplies. The 56-VQFNP integration of 5 BUCKs and 4 LDOs replaces a multi-chip power solution, shrinking controller boards in mobile robots and factory automation hardware. Per-rail telemetry over I2C/SPI supports predictive-maintenance diagnostics, while short-circuit and thermal protection guard against stall-driven power faults common in actuator-driven systems.
推荐
推荐产品汇总
工程参考数据： TPS6594-Q1 ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | TPS65941111RWERQ1 | TPS6593-Q1 | LP8764-Q1 | TPS65224-Q1 |
|---|---|---|---|---|---|
| Package | 56-VQFNP (8x8 mm) | 56-VQFNP - same | 56-VQFNP - same | 56-VQFNP - same | VQFN-32 - different |
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Safety Capability | ASIL-D per ISO 26262 | ASIL-D | ASIL-D | ASIL-D | ASIL-B/D capable |
| NVM Configuration | Factory-programmed, variant-specific | Jacinto 7 pre-config | Variant-specific | Variant-specific | Variant-specific |
关键差异点
- Complete companion PMIC with RTC and backup power （对比 LP8764-Q1)
- Highest rail count with ASIL-D diagnostics in one package （对比 TPS65224-Q1)
- Platform-tailored NVM variants reduce rework （对比 TPS6593-Q1)
设计说明
The NVM configuration is the single largest integration risk: default voltages, sequencing, and GPIO behavior are factory-set per orderable variant (e.g., TPS65941111RWERQ1 vs TPS65941213RWERQ1). Selecting the wrong variant can mis-sequence a Jacinto 7 power-up and brown-out the SoC. Confirm NVM config against TI Power Configurator output and the processor power reference design before ordering.
With four multi-phase BUCKs at 3.5 A per phase plus a 2 A BUCK, total losses can reach several watts at high load. The 56-VQFNP exposed-pad package requires solid thermal vias to inner ground planes under the pad. Model worst-case dissipation with the TI Power Configurator efficiency estimates and verify junction temperature stays within limits per datasheet SLVSEA7.
Follow the TPS6594-Q1 user guide and Jacinto 7 power reference design (TPS6594-Q1 series EVM documentation) for BUCK placement: minimize loop area from input caps to BUCK pins, place output inductors and sense connections close, and route the safety I2C/SPI bus away from switching nodes to preserve signal integrity for the CRC-monitored safety interface.
合规信息
Automotive grade -Q1 part (AEC-Q100 qualified per TI automotive qualification practice). RoHS/lead-free status per TI product page; REACH and halogen details not stated in provided data.
