5CSEBA4U23C6N vs 5CSEBA4U23C7SN Comparación
Comparación detallada lado a lado de 5CSEBA4U23C6N por Intel y 5CSEBA4U23C7SN por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
5CSEBA4U23C6N - Cyclone V SE SoC FPGA 40K LE, Dual ARM Cortex-A9 | Intel
5CSEBA4U23C6N ✓ ActivoIntel
5CSEBA4U23C7SN - Cyclone V SE SoC FPGA, 40K LE, Dual ARM Cortex-A9 | Intel
5CSEBA4U23C7SN ✓ ActivoComparación de especificaciones
| Parámetro | 5CSEBA4U23C6N | 5CSEBA4U23C7SN |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $86,20 | $18,20 |
| Family | Cyclone V SE SoC FPGA | Cyclone V SE SoC FPGA |
| Logic Elements | 40,000 | — |
| Adaptive Logic Modules (ALMs) | [DATA_NEEDED: ALM count] | [DATA_NEEDED: ALM count] |
| Embedded Memory (M10K + MLAB) | 2,460 Kbits | — |
| DSP Blocks (18x18 Multipliers) | 112 | — |
| HPS Processor Cores | Dual ARM Cortex-A9 MPCore | — |
| HPS Maximum CPU Clock | 925 MHz | — |
| Hard Memory Controller | DDR3 / DDR3L / LPDDR2 | — |
| Process Technology | TSMC 28 nm low-power | — |
| Core Voltage (VCC) | 1.1 V | — |
| General-Purpose FPGA I/Os | 188 | — |
| Transceivers | Not integrated on SE device | — |
| Encapsulado | 672-pin UFBGA / UBGA, 23 x 23 mm, 0.8 mm pitch | 672-ball UBGA, 23x23 mm |
| Tipo de montaje | Surface Mount (BGA) | — |
| Temperatura de unión de funcionamiento | -40 C to +100 C (typical SE spec; exact C6 grade per datasheet) | — |
| Configuration Modes | JTAG (IEEE 1149.1), Active Serial (AS) via EPCS/EPCQ | JTAG, serial passive/active |
| Estado RoHS | Compliant | Compliant |
| Device Logic Elements | — | 40,000 |
| Hard Processor System | — | Dual-core ARM Cortex-A9 MPCore with CoreSight |
| HPS Maximum Frequency | — | 800 MHz |
| Embedded Memory (Kbits) | — | 2,460 |
| DSP Blocks (18x18) | — | 112 |
| Maximum User I/Os | — | 364 |
| Ball Pitch | — | 0.8 mm |
| Process Node | — | TSMC 28 nm low-power |
| Temperatura de funcionamiento | — | -40C to +85C (industrial) |
| Memory Interfaces | — | DDR2, DDR3, LPDDR2 (hard controller) |
| Peripherals (HPS) | — | USB 2.0 OTG, GbE MAC, CAN, SPI, I2C, UART |
| Speed Grade | — | C7 |