H58G66CK8BX147 vs H58G66CK8BX147N Comparación
Comparación detallada lado a lado de H58G66CK8BX147 por SK hynix y H58G66CK8BX147N por SK hynix. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | H58G66CK8BX147 | H58G66CK8BX147N |
|---|---|---|
| Marca | SK hynix | SK hynix |
| Categoría | Memory ICs | Memory ICs |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $0,00 | $34,60 |
| Tipo de memoria | LPDDR5X SDRAM | LPDDR5X SDRAM |
| Density | 8GB (1Gx8, 2CH, 2CS) | 64 Gbit (8 GB) |
| Organización de memoria | x8 | x8 (single channel) |
| Speed Grade | LPDDR5X-8533 (8533 Mbps/pin) | — |
| Supply Voltage (VDD1) | 1.8 V | — |
| Core Voltage (VDD2) | 1.05 V | — |
| I/O Voltage (VDDQ) | 0.5 V | — |
| Operating Voltage Range | 0.5 V to 1.8 V | — |
| Encapsulado | 315-ball FBGA (Lead & Halogen Free) | 315-ball FBGA |
| Canales | 1 channel, 2 chip selects | — |
| Bus Width Modes | x16 / x8 per JEDEC compliant SDRAM definition | — |
| Temperatura de funcionamiento | -25C and above (per FBGA specification) | [DATA_NEEDED: Operating Temperature Range] |
| Standard | JEDEC compliant LPDDR5/5X SDRAM | — |
| Estado RoHS | Compliant (lead-free package) | [DATA_NEEDED: RoHS Status] |
| Sin halógenos | Yes | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Maximum Data Rate | — | 8533 Mbps |
| Supply Voltage Domain | — | 0.5 V to 1.8 V |
| Core Voltage Class | — | 1.05 V (LPDDR5/LPDDR5X class) |
| Standard Compliance | — | JEDEC-compliant single-channel SDRAM (per SK hynix 315-ball FBGA specification) |
| Interfaz | — | LPDDR5/LPDDR5X protocol |
| Channel Configuration | — | Single channel (x8 or x16 capable family) |
| Power Management | — | Dynamic voltage and frequency scaling (DVFSC/DVFSQ) |
| Application Domain | — | Smartphone, AI edge, server-class mobile computing |
| Refresh Scheme | — | LPDDR5 per-bank / all-bank refresh |