AD5252BRUZ50 - Dual 256-Tap 50kΩ I2C EEMEM DigiPOT | ADI
N.º de pieza: AD5252BRUZ50 ✓ Activo| Cant. | Precio unitario | Total |
|---|---|---|
| 1 | $5.62 | $5,62 |
| 10 | $5.06 | $50,60 |
| 100 | $4.5 | $450,00 |
| 500 | $4.05 | $2.025,00 |
| 1.000 | $3.6 | $3.600,00 |
AD5252BRUZ50 Descripción general
What is a digital potentiometer? A digital potentiometer (DigiPOT) is a solid-state, digitally controllable variable resistor that emulates the wiper action of a mechanical trimpot or potentiometer. DigiPOTs sit within the broader hierarchy of programmable resistors and integrated mixed-signal ICs, communicating via serial interfaces such as I2C or SPI. Compared to mechanical potentiometers, DigiPOTs eliminate physical wear, allow remote/automated adjustment, and integrate memory for nonvolatile setpoint storage.
Key features include 256 positions per channel (8-bit resolution), 100 kΩ EEMEM endurance with write-protect, I2C-compatible 2-wire serial interface, predefined linear increment/decrement commands, ±6 dB step change commands, synchronous or asynchronous dual-channel update, and selectable slave addresses via AD0/AD1 pins (up to 4 devices on one bus). The RDAC register provides direct wiper programming for real-time adjustment.
The AD5252 architecture pairs two RDAC resistor arrays with EEMEM, a precision bandgap-derived reference, and an I2C slave interface. The wiper resistance, wiper-on-resistance matching, and low temperature coefficient suit instrumentation, audio, and industrial control applications where long-term setting stability is required.
Typical applications include LCD display brightness and contrast control, mechanical potentiometer replacement, programmable gain amplifiers, programmable filters and delays, transducer calibration, audio volume control, and RF bias adjustment. The I2C interface allows host MCU control, while the nonvolatile memory preserves calibration data across power cycles.
When designing with this device, observe the absolute maximum VDD of 7 V, use 0.1 µF decoupling close to VDD/GND, and respect the dual-supply mode requirement of ±2.25 V to ±2.75 V or single-supply 2.25 V to 5.5 V. EEMEM writes require tWR (write cycle time) per the manufacturer datasheet; verify timing when programming in-loop.
This page synthesizes distributor pricing, drop-in alternative cross-references, and practical design notes not found in the standalone manufacturer datasheet, accelerating component selection and PCB bring-up.
Alternativas directas para AD5252BRUZ50 — mismo encapsulado, compatible pin a pin. Se excluyen las piezas de otro encapsulado que requieren retrabajo de la PCB.
Herramienta de comparación rápida — seleccione piezas alternativas para compararlas lado a lado:
AD5252BRUZ50-RL7
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
AD5252BRUZ10
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
AD5252BRUZ1
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
AD5252BRUZ100
✅ Sustitución directa📋 Alternativa de referencia (no en el catálogo)
AD5251BRUZ50
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AD5252BRUZ50 Valores máximos y características eléctricas
| End-to-End Resistance (R-AB) | 50 kohm |
| Number of Channels | 2 (Dual) |
| Number of Taps/Positions | 256 (8-bit) |
| Track Taper | Linear |
| Resistance Tolerance | ±20% |
| Interfaz | I2C (2-Wire, I2C-compatible) |
| Nonvolatile Memory (EEMEM) | 100 k write cycles, wiper position storage |
| Supply Voltage (Dual-Supply) | ±2.25 V to ±2.75 V |
| Slave Address Pins | AD0, AD1 (up to 4 devices per I2C bus) |
| Encapsulado | 14-TSSOP (RU-14) |
| Tipo de montaje | Surface Mount |
| Nivel MSL | 1 (per JEDEC J-STD-020) |
| Estado RoHS | Compliant |
| Lead-Free | Yes |
| Predefined Commands | Linear increment/decrement; ±6 dB step change |
| Update Mode | Synchronous or asynchronous dual-channel update |
Configuración de pines de AD5252BRUZ50
| Pin 1 | A1 — Terminal A of RDAC1 (resistor end A, channel 1) |
| Pin 2 | W1 — Wiper of RDAC1 (channel 1 wiper terminal) |
| Pin 3 | B1 — Terminal B of RDAC1 (resistor end B, channel 1) |
| Pin 4 | VDD — Positive supply voltage |
| Pin 5 | GND — Ground |
| Pin 6 | VSS — Negative supply (dual-supply mode) |
| Pin 7 | SCL — I2C serial clock input |
| Pin 8 | SDA — I2C serial data input/output |
| Pin 9 | AD0 — Slave address bit 0 (LSB) |
| Pin 10 | AD1 — Slave address bit 1 |
| Pin 11 | WP — Write-protect for EEMEM (active high) |
| Pin 12 | NC — Not connected (per datasheet) |
| Pin 13 | B2 — Terminal B of RDAC2 (channel 2) |
| Pin 14 | W2/A2 — Wiper/terminal A of RDAC2 (channel 2 - shared pin) |
Aplicaciones típicas
AD5252BRUZ50 es adecuado para 6 aplicacións: LCD Display Brightness & Contrast Control, Programmable Gain Amplifier (PGA) Calibration, Mechanical Potentiometer Replacement, Programmable Filter & Time-Constant Adjustment, Transducer Calibration & Sensor Offset Trim, Audio Volume & Tone Control.
LCD Display Brightness & Contrast Control
The AD5252BRUZ50's dual 256-tap channels and I2C interface make it ideal for digital LCD backlight brightness and contrast adjustment, replacing mechanical trimpots with MCU-controlled precision. With 50 kΩ end-to-end resistance, the wiper drives a bias network for backlight LED current or contrast voltage on the LCD. EEMEM stores the user-selected brightness across power cycles, eliminating re-calibration. Synchronous dual-channel update keeps brightness and contrast in lockstep during transitions. Compared to a PWM-based approach, the resistive divider injects no switching noise into the analog bias rail, important for TFT-LCD timing-sensitive bias generation.
Recomendado
Programmable Gain Amplifier (PGA) Calibration
The AD5252BRUZ50 enables precision digitally-programmable gain in instrumentation amplifier circuits. With 256 taps over 50 kΩ, the wiper sets the feedback ratio of an op-amp in non-inverting or inverting configuration, allowing host software to calibrate gain at production or in the field. The nonvolatile EEMEM stores calibration coefficients permanently, removing the need for manual trim during manufacturing. Low wiper resistance and excellent channel-to-channel matching make the dual channels suitable for differential gain stages. Compared to a DAC-based PGA, the resistive divider adds no quantization noise and consumes no switching current, simplifying low-noise analog front-ends.
Recomendado
Mechanical Potentiometer Replacement
The AD5252BRUZ50 directly replaces mechanical potentiometers in audio, instrumentation, and control panels where physical wear limits product lifetime. The I2C interface allows remote or automated adjustment via buttons, encoder, or host MCU, eliminating the panel cutout and shaft-sealing costs. The 100 k-cycle EEMEM endurance outlasts any mechanical pot, and the lack of moving parts removes shock/vibration failure modes. With 256 linear taps, adjustment resolution meets or exceeds most audio-taper applications, and synchronous dual-channel update replaces stereo volume/balance pots in a single chip.
Recomendado
Programmable Filter & Time-Constant Adjustment
The AD5252BRUZ50 sets the RC time constant of active low-pass, high-pass, or state-variable filters by varying the resistance portion of the RC network, allowing host MCU control of cutoff frequency without component swaps. With 50 kΩ and 256 taps, the wiper adjusts resistance from near-zero to nearly full-scale in fine 196 Ω steps (50 kΩ/255), enabling precise filter tuning. Both channels can independently set R for stereo or cascaded filter sections. The EEMEM stores filter calibration for production-line compensation of capacitor tolerances, eliminating manual trim.
Recomendado
Transducer Calibration & Sensor Offset Trim
The AD5252BRUZ50 calibrates sensor offset and span in pressure, temperature, strain-gauge, and bridge-sensor signal chains. The 256-tap dual channels allow offset-nulling and span-adjustment in the same IC, with EEMEM retaining factory calibration values. The I2C interface permits automated end-of-line calibration by the host, eliminating manual trim pots on the PCB and the associated rework cost. Low wiper resistance and good temperature coefficient suit industrial sensor modules operating from -40 °C to +85 °C ambient, per the AD5251/AD5252 datasheet characteristics.
Recomendado
Audio Volume & Tone Control
The AD5252BRUZ50 implements digital audio volume and tone control by replacing potentiometers in the audio signal path. The dual channels allow stereo volume or volume+balance control in a single 14-TSSOP IC, with the I2C interface enabling remote, button, or encoder-driven volume adjustment. The 50 kΩ resistance and 256 linear taps give smooth volume taper, and EEMEM remembers the user's last setting across power cycles. Low THD and noise performance (per datasheet) preserves audio fidelity in line-level signal chains, and the small 14-TSSOP footprint suits portable and headphone-amp designs.
Recomendado
Resumen de productos recomendados
Datos de referencia de ingeniería para AD5252BRUZ50 — comparación, orientación de diseño e información de cumplimiento.
Guía de selección
Comparación con alternativas
| Parámetro | Este producto | AD5252BRUZ50-RL7 | AD5252BRUZ10 | AD5252BRUZ1 | AD5252BRUZ100 | AD5251BRUZ50 |
|---|---|---|---|---|---|---|
| Brand | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices |
| Package | 14-TSSOP (RU-14) | 14-TSSOP (RU-14) - same | 14-TSSOP (RU-14) - same | 14-TSSOP (RU-14) - same | 14-TSSOP (RU-14) - same | 14-TSSOP (RU-14) - same |
| End-to-End Resistance | 50 kΩ | 50 kΩ | 10 kΩ | 1 kΩ | 100 kΩ | 50 kΩ |
| Number of Taps | 256 (8-bit) | 256 | 256 | 256 | 256 | 64 (6-bit) |
| Interface | I2C | I2C | I2C | I2C | I2C | I2C |
| EEMEM Endurance | 100 k cycles | 100 k cycles | 100 k cycles | 100 k cycles | 100 k cycles | 100 k cycles |
| Number of Channels | 2 (Dual) | 2 | 2 | 2 | 2 | 2 |
| RoHS Compliance | Yes | Yes | Yes | Yes | Yes | Yes |
Diferenciadores clave
- 256-tap (8-bit) resolution per channel vs AD5251's 64-tap (6-bit) (frente a AD5251BRUZ50)
- 50 kΩ nominal resistance provides balanced impedance for general-purpose signal paths (frente a AD5252BRUZ10 (10 kΩ) and AD5252BRUZ1 (1 kΩ))
- Nonvolatile EEMEM with 100 k-cycle endurance stores wiper settings permanently (frente a MCP4651 (volatile wiper only))
Notas de diseño
Decouple VDD with a 0.1 µF ceramic capacitor placed within 3 mm of the VDD pin and a 10 µF bulk capacitor at the supply entry point. In dual-supply mode, also decouple VSS to GND with a 0.1 µF capacitor. Hold SDA and SCL low during power-up to prevent unintended I2C transactions; the AD5251/AD5252 datasheet specifies the power-on reset (POR) behavior for the RDAC and EEMEM registers.
Route SDA and SCL away from noisy analog signal paths; keep the trace length under 50 mm if possible. Use 4.7 kΩ to 10 kΩ I2C pull-ups to VDD (not to a separate rail) for reliable rise-time at standard-mode 100 kHz and fast-mode 400 kHz I2C. Keep the wiper traces short to minimize parasitic capacitance, which can couple into high-impedance signal paths.
Do not exceed the maximum wiper current (per datasheet) - typically a few mA - or the wiper contact will degrade. Do not apply voltages beyond VDD/VSS on terminals A, B, or W. EEMEM write operations require tWR (write cycle time, per datasheet) during which the device does not acknowledge I2C; poll the WP/READY status before issuing subsequent commands. Always assert WP (write-protect) high in production to prevent accidental EEMEM corruption.
Información de cumplimiento
RoHS compliant per Analog Devices product page and DigiKey listing. Not AEC-Q100 qualified - industrial/commercial grade only. Lead-free (Pb-free) finish per the 'Z' suffix in BRUZ50. Halogen-free status not confirmed from verified web data.
