EP1810LC-45 vs EP1810JC-25 مقایسه
مقایسه دقیق کنار به کنار EP1810LC-45 توسط Rochester Electronics و EP1810JC-25 توسط Intel. مشخصات کلیدی، پارامترهای الکتریکی، بسته‌بندی، وضعیت چرخه عمر، قیمت‌گذاری و موجودی را مقایسه کنید تا بهترین قطعه را برای نیازهای طراحی خود تعیین کنید.
Rochester Electronics
EP1810LC-45 - 900-Gate Classic EPLD, 48 Macro Cells, PLCC-68 | Intel
EP1810LC-45 Obsolete
مقایسه مشخصات
| پارامتر | EP1810LC-45 | EP1810JC-25 |
|---|---|---|
| برند | Rochester Electronics | Intel |
| دسته‌بندی | FPGA & CPLD | FPGA & CPLD |
| وضعیت چرخه عمر | Obsolete | NRND |
| Family | Altera Classic EPLD | Altera/Intel Classic EPLD (EP1810 series) |
| Device Type | EPLD (Erasable Programmable Logic Device) | — |
| Usable Gates | 900 | — |
| Macro Cells | 48 | — |
| Maximum Inputs | 64 | — |
| Maximum Outputs | 48 | — |
| Logic Array Blocks | 4 | — |
| Propagation Delay (tpd) | 45 ns | — |
| Maximum Operating Frequency | 22.2 MHz | — |
| Supply Voltage (Vcc) | 5 V (±5%) | — |
| Process Technology | 5 V CMOS EPROM | — |
| بسته‌بندی | 68-pin PLCC (J-lead) | 28-pin ceramic DIP (J) with quartz window |
| دمای کاری | 0 °C to +70 °C (commercial) | -40 °C to 85 °C (industrial, per distributor listings) |
| نوع نصب | Surface Mount (PLCC socket compatible) | Through-hole |
| وضعیت RoHS | [DATA_NEEDED: RoHS status of Rochester-sourced part] | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | [DATA_NEEDED: lead-free finish] | — |
| Product Type | — | Classic EPLD (Erasable Programmable Logic Device) |
| Macrocells | — | 48 |
| Propagation Delay (tPD) | — | 25 ns |
| Maximum Toggle Frequency | — | [DATA_NEEDED: max fMAX] |
| Input Lines | — | 60 (including I/O) |
| I/O Lines | — | 48 |
| Dedicated Inputs | — | 12 |
| External Clock Inputs | — | 4 |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V |
| Technology | — | CMOS, UV-erasable (windowed ceramic DIP) |
| Erasure Method | — | UV light (windowed package) |
| وضعیت چرخه عمر | — | NRND (Not Recommended for New Designs) |