EP1M350F780I7N vs EP1M350F780C6N مقایسه
مقایسه دقیق کنار به کنار EP1M350F780I7N توسط Altera و EP1M350F780C6N توسط Intel. مشخصات کلیدی، پارامترهای الکتریکی، بسته‌بندی، وضعیت چرخه عمر، قیمت‌گذاری و موجودی را مقایسه کنید تا بهترین قطعه را برای نیازهای طراحی خود تعیین کنید.
Intel
EP1M350F780C6N - Mercury 350K FPGA, 486 I/O, 780-BGA | Intel (Altera)
EP1M350F780C6N ⚠ آخرین فرصت خریدمقایسه مشخصات
| پارامتر | EP1M350F780I7N | EP1M350F780C6N |
|---|---|---|
| برند | Altera | Intel |
| دسته‌بندی | FPGA & CPLD | FPGA & CPLD |
| وضعیت چرخه عمر | Obsolete | آخرین فرصت خرید |
| Device Family | Mercury PLD (Enhanced Configuration Device) | — |
| عملکرد | Configuration device for SRAM-based LUT FPGAs | — |
| بسته‌بندی | 780-ball FineLine BGA | 780-ball FC-FBGA (FINE LINE BGA-780) |
| Speed Grade | 7 | — |
| محدوده دمای کاری | -40C to +100C (Industrial, I suffix) | — |
| Configuration Modes | Serial and parallel FPGA configuration | — |
| Programming Interface | JTAG (IEEE 1149.1) boundary-scan | — |
| On-chip Memory | Flash memory array | — |
| Configuration Controller | Integrated state-machine controller | — |
| Bitstream Support | CRC-validated, compression-compatible | — |
| نوع نصب | Surface Mount (BGA) | — |
| سطح MSL | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: msl_level] |
| وضعیت RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: rohs_status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | [DATA_NEEDED: lead_free] |
| Configuration Compatibility | High-density SRAM-based LUT FPGAs (Stratix and equivalent) | — |
| Family | — | Mercury (EP1M350) |
| Device Type | — | Loadable Programmable Logic Device (PLD) / FPGA |
| Logic Family | — | CMOS, SRAM-based LUT |
| System Gates | — | 350,000 |
| Logic Cells / Elements | — | 14,400 |
| User I/Os | — | 486 |
| Integrated Transceivers | — | Yes, with CDR up to 1.25 Gbps |
| Core Supply Voltage | — | 1.8 V |
| Terminal Form | — | Ball |
| Package Code (JEDEC) | — | S-PBGA-B780 |
| دمای کاری | — | 0 C to 85 C |
| Configuration Interface | — | JTAG (IEEE 1149.1) / passive serial |
| Architecture | — | Look-up table (LUT)-based, optimized for high-speed serial I/O |
| Total Package Pins / Balls | — | 780 |