10M50SAE144C8G vs 10M50SCE144A7G Comparaison
Comparaison détaillée côte à côte de 10M50SAE144C8G par Intel et 10M50SCE144A7G par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | 10M50SAE144C8G | 10M50SCE144A7G |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $47,90 | $12,85 |
| Series | MAX 10 | MAX 10 |
| Family | MAX 10 FPGA | — |
| Logic Elements (LE) | 50000 | 50,000 |
| Embedded Memory | 1677312 bits (approx. 1.6 Mbit) | — |
| Maximum User I/Os | 101 | — |
| Boîtier | 144-LQFP Exposed Pad (EQFP-144) | — |
| Package Dimensions | 22 x 22 mm, 0.50 mm pitch | — |
| Température de fonctionnement | 0C to +85C (Commercial, "C8" grade) | -40C to +100C (industrial) |
| Supply Voltage - Core | [DATA_NEEDED: core Vcc] | 1.2 V (internal) |
| Process Technology | 55 nm embedded flash CMOS | TSMC 55 nm NOR-flash + SRAM |
| Configuration | Non-volatile, single-chip (on-chip flash) | — |
| On-chip User Flash | Up to 1.4 Mbit | — |
| ADC | 12-bit successive-approximation, up to 17 channels | — |
| Embedded Multipliers (18x18) | [DATA_NEEDED: 18x18 multiplier count] | — |
| I/O Standards | LVCMOS, LVDS, SSTL, RSDS, PCI | — |
| Hot Socketing | Yes | — |
| Type de montage | Surface Mount | Surface Mount |
| Statut RoHS | Compliant | Compliant |
| Niveau MSL | 3 | 3 (per JEDEC J-STD-020) |
| Thermal Resistance (Theta-JA) | [DATA_NEEDED: theta-JA C/W] | — |
| Embedded Memory (M9K blocks) | — | [DATA_NEEDED: M9K block count and total bits] |
| Total User Flash Bits | — | 1,677,312 bits |
| User I/O Count | — | 101 |
| Number of LABs/CLBs | — | 3,125 |
| Supply Voltage - I/O | — | 3.0 V / 3.3 V LVCMOS/LVTTL |
| Boîtier / Format | — | 144-LQFP Exposed Pad (EQFP-144) |
| Number of PLLs | — | 2 |
| Integrated ADC | — | 12-bit, 1 MSPS (analog inputs package-dependent) |
| Configuration Method | — | On-chip non-volatile flash (instant-on, no external boot PROM) |