EP3C16E144I7 vs EP3C16E144I7N Comparaison
Comparaison détaillée côte à côte de EP3C16E144I7 par Intel et EP3C16E144I7N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP3C16E144I7 | EP3C16E144I7N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Device Type | Field Programmable Gate Array (FPGA) | — |
| FPGA Family | Cyclone III | — |
| Logic Cells | 15,408 | — |
| I/O Count | 84 | — |
| Boîtier | 144-LQFP Exposed Pad | 144-LQFP Exposed Pad (EQFP-144) |
| Package Code | LFQFP | — |
| Package Body Size | 20 x 20 mm | — |
| Package Pitch | 0.40 mm | — |
| Nombre de broches | 144 | — |
| Terminal Type | Gull wing | — |
| Package Shape | Square | — |
| Temperature Grade | Industrial | — |
| Type de montage | Surface Mount | Surface Mount |
| Embedded Memory | [DATA_NEEDED: embedded memory specification] | — |
| Core Supply Voltage | [DATA_NEEDED: core supply voltage] | — |
| I/O Supply Voltage | [DATA_NEEDED: I/O supply voltage] | — |
| Plage de température de fonctionnement | [DATA_NEEDED: operating temperature range] | — |
| Configuration Interface | [DATA_NEEDED: configuration interface] | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | — |
| Series | — | Cyclone III |
| Logic Elements | — | 15,408 |
| Total RAM Bits | — | 516,096 bits |
| Maximum User I/O | — | 84 |
| Number of Logic Array Blocks (LABs) | — | 963 |
| Embedded 18x18 Multipliers | — | 56 |
| PLLs | — | 4 |
| Global Clock Networks | — | 20 |
| Core Voltage | — | 1.2 V |
| I/O Bank Voltage Support | — | 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.0 V / 3.3 V |
| Température de fonctionnement | — | -40C to +100C (industrial, junction) |
| Speed Grade | — | 7 (I7) |
| Lead-Free / RoHS | — | Yes (lead-free finish, RoHS compliant per manufacturer product page) |
| Process Technology | — | 65 nm low-power CMOS |
| Configuration Scheme | — | Active serial, passive serial, JTAG |