EPM3128ATC100-5 vs EPM3128ATC144-5 Comparaison
Comparaison détaillée côte à côte de EPM3128ATC100-5 par Intel et EPM3128ATC144-5 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM3128ATC100-5 | EPM3128ATC144-5 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $15,43 | $4,85 |
| Series | MAX 3000A | — |
| Family | CPLD - MAX 3000A | MAX 3000A |
| Macrocells | 128 | — |
| Usable Gates | 2,500 | — |
| User I/Os | 80 | — |
| Dedicated Inputs | 4 | — |
| Pin-to-Pin Delay (tpd) | 5 ns (commercial); 7.5 ns | — |
| Maximum Frequency (fCNT) | 192.3 MHz | — |
| Supply Voltage (VCCINT/VCCIO) | 3.3 V | — |
| Output Drive Voltage | 2.5 V or 3.3 V (programmable) | — |
| Input Tolerance | 2.5 V, 3.3 V, 5.0 V tolerant | — |
| Program Memory Type | EEPROM | EEPROM (non-volatile) |
| In-System Programmability | Yes, IEEE Std. 1532 compliant | Yes (IEEE Std. 1532 compliant) |
| JTAG Boundary Scan | Yes, IEEE Std. 1149.1 | — |
| Température de fonctionnement | 0 °C to 70 °C (Commercial) | 0C to +70C (Commercial) |
| Boîtier | 100-pin TQFP (Fine Line) | TQFP-144 (Plastic, 1.0 mm pitch, 22x22 mm) |
| Type de montage | Surface Mount | — |
| Logic Family | CMOS | CMOS |
| Statut RoHS | [DATA_NEEDED: RoHS status] | Not Compliant (per Arrow distributor listing) |
| Process Technology | CMOS EEPROM | 0.30 um CMOS EEPROM, 4 metal layers |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Number of Macrocells | — | 128 |
| Number of Logic Array Blocks (LABs) | — | 8 |
| Number of User I/Os | — | 96 |
| Device System Gates | — | 2500 |
| Product Terms per Macrocell | — | 32 |
| Propagation Delay (tPD) | — | 7.5 ns |
| Maximum Internal Frequency | — | 192.3 MHz |
| Number of Global Clocks | — | 2 |
| Supply Voltage (Core) | — | 3.3 V |
| Multi-Volt I/O Voltage | — | 2.5 V / 3.3 V / 5.0 V tolerant |
| JTAG / IEEE 1149.1 | — | Yes (boundary-scan + ISP) |
| ECCN | — | EAR99 |
| HTS Code | — | 8542.31.00.55 |