EPM3128ATC100-5 vs EPM3128ATC144-5 Comparison
Detailed side-by-side comparison of EPM3128ATC100-5 by Intel and EPM3128ATC144-5 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM3128ATC100-5 | EPM3128ATC144-5 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $15.43 | $4.85 |
| Series | MAX 3000A | β |
| Family | CPLD - MAX 3000A | MAX 3000A |
| Macrocells | 128 | β |
| Usable Gates | 2,500 | β |
| User I/Os | 80 | β |
| Dedicated Inputs | 4 | β |
| Pin-to-Pin Delay (tpd) | 5 ns (commercial); 7.5 ns | β |
| Maximum Frequency (fCNT) | 192.3 MHz | β |
| Supply Voltage (VCCINT/VCCIO) | 3.3 V | β |
| Output Drive Voltage | 2.5 V or 3.3 V (programmable) | β |
| Input Tolerance | 2.5 V, 3.3 V, 5.0 V tolerant | β |
| Program Memory Type | EEPROM | EEPROM (non-volatile) |
| In-System Programmability | Yes, IEEE Std. 1532 compliant | Yes (IEEE Std. 1532 compliant) |
| JTAG Boundary Scan | Yes, IEEE Std. 1149.1 | β |
| Operating Temperature | 0 Β°C to 70 Β°C (Commercial) | 0C to +70C (Commercial) |
| Package | 100-pin TQFP (Fine Line) | TQFP-144 (Plastic, 1.0 mm pitch, 22x22 mm) |
| Mounting Type | Surface Mount | β |
| Logic Family | CMOS | CMOS |
| RoHS Status | [DATA_NEEDED: RoHS status] | Not Compliant (per Arrow distributor listing) |
| Process Technology | CMOS EEPROM | 0.30 um CMOS EEPROM, 4 metal layers |
| Device Type | β | CPLD (Complex Programmable Logic Device) |
| Number of Macrocells | β | 128 |
| Number of Logic Array Blocks (LABs) | β | 8 |
| Number of User I/Os | β | 96 |
| Device System Gates | β | 2500 |
| Product Terms per Macrocell | β | 32 |
| Propagation Delay (tPD) | β | 7.5 ns |
| Maximum Internal Frequency | β | 192.3 MHz |
| Number of Global Clocks | β | 2 |
| Supply Voltage (Core) | β | 3.3 V |
| Multi-Volt I/O Voltage | β | 2.5 V / 3.3 V / 5.0 V tolerant |
| JTAG / IEEE 1149.1 | β | Yes (boundary-scan + ISP) |
| ECCN | β | EAR99 |
| HTS Code | β | 8542.31.00.55 |