EPM5032DM883B vs EPM5032DC20 Comparaison
Comparaison détaillée côte à côte de EPM5032DM883B par Altera et EPM5032DC20 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM5032DM883B | EPM5032DC20 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $64,50 | $8,20 |
| Family | MAX 5000 (Classic EPLD) | — |
| Macrocells | 32 | 32 |
| Logic Elements | 32 macrocells (MAX architecture) | — |
| Technology | UV-erasable EPROM cell | — |
| Propagation Delay (tPD) | [DATA_NEEDED: tPD in ns] | 20 ns |
| Maximum Counter Frequency (fCNT) | [DATA_NEEDED: fCNT in MHz] | — |
| Supply Voltage (VCC) | 5 V (nominal, TTL-compatible I/O) | 5 V (4.75 V to 5.25 V) |
| Température de fonctionnement | MILITARY (per /883B screen) | [DATA_NEEDED: operating temperature range] |
| MIL-STD-883 Screening | Class B (DM/883B) | — |
| Package Type | WDIP-28 (ceramic DIP with quartz window) | — |
| Nombre de broches | 28 | — |
| Type de montage | Through-Hole | Through-Hole (DIP) |
| Terminal Form | Through-Hole | — |
| Package Shape | RECTANGULAR | — |
| Programming Method | Programmer + UV erase | — |
| Statut RoHS | [DATA_NEEDED: lead-bearing ceramic; likely non-compliant] | [DATA_NEEDED: RoHS compliance] |
| Device Family | — | MAX 5000 |
| Product Type | — | UV-erasable PLD (CPLD class) |
| Usable Gates | — | 600 |
| Maximum Frequency (Fmax) | — | 71.4 MHz |
| Dedicated Inputs | — | 7 |
| I/O Pins | — | 16 (bidirectional) |
| Total Inputs (max) | — | 24 |
| Output Macrocells | — | 16 |
| Clock Inputs | — | 1 (global) |
| Architecture | — | PAL-type with Programmable Interconnect Array (PIA) |
| Process Technology | — | CMOS |
| Boîtier | — | 20-pin Ceramic DIP (DC) with UV window |