EPM5032DM883B vs EPM5032DC20 비교
다음의 상세 나란히 비교: EPM5032DM883B 제조: Altera 및 EPM5032DC20 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EPM5032DM883B | EPM5032DC20 |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $64.50 | $8.20 |
| Family | MAX 5000 (Classic EPLD) | — |
| Macrocells | 32 | 32 |
| Logic Elements | 32 macrocells (MAX architecture) | — |
| Technology | UV-erasable EPROM cell | — |
| Propagation Delay (tPD) | [DATA_NEEDED: tPD in ns] | 20 ns |
| Maximum Counter Frequency (fCNT) | [DATA_NEEDED: fCNT in MHz] | — |
| Supply Voltage (VCC) | 5 V (nominal, TTL-compatible I/O) | 5 V (4.75 V to 5.25 V) |
| 동작 온도 | MILITARY (per /883B screen) | [DATA_NEEDED: operating temperature range] |
| MIL-STD-883 Screening | Class B (DM/883B) | — |
| Package Type | WDIP-28 (ceramic DIP with quartz window) | — |
| 핀 수 | 28 | — |
| 실장 유형 | Through-Hole | Through-Hole (DIP) |
| Terminal Form | Through-Hole | — |
| Package Shape | RECTANGULAR | — |
| Programming Method | Programmer + UV erase | — |
| RoHS 상태 | [DATA_NEEDED: lead-bearing ceramic; likely non-compliant] | [DATA_NEEDED: RoHS compliance] |
| Device Family | — | MAX 5000 |
| Product Type | — | UV-erasable PLD (CPLD class) |
| Usable Gates | — | 600 |
| Maximum Frequency (Fmax) | — | 71.4 MHz |
| Dedicated Inputs | — | 7 |
| I/O Pins | — | 16 (bidirectional) |
| Total Inputs (max) | — | 24 |
| Output Macrocells | — | 16 |
| Clock Inputs | — | 1 (global) |
| Architecture | — | PAL-type with Programmable Interconnect Array (PIA) |
| Process Technology | — | CMOS |
| 패키지 | — | 20-pin Ceramic DIP (DC) with UV window |