EPM5192LI-2 vs EPM5192LI-1 Comparaison
Comparaison détaillée côte à côte de EPM5192LI-2 par Altera et EPM5192LI-1 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM5192LI-2 | EPM5192LI-1 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $7,90 | $16,40 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (Erasable/OTP Complex PLD) | EPLD (UV-Erasable/OTP Complex PLD) |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | — |
| User I/O | 64 | — |
| Total Inputs | 72 (7 dedicated + 64 I/O) | — |
| Propagation Delay (tpd) | 55 ns (max) | — |
| Maximum Internal Frequency | 100 MHz | — |
| Tension d'alimentation | 4.5 V to 5.5 V | 5 V |
| Température de fonctionnement | -40 C to +85 C (industrial) | [DATA_NEEDED: industrial vs military range] |
| Typical Power Dissipation | 600 mW at 5 V / 25 C | — |
| Technology | CMOS, UV-erasable / OTP | — |
| Boîtier | 84-pin PLCC (J-lead), JEDEC S-PQCC-J84 | — |
| Type de montage | Surface Mount | Surface Mount (JLCC with J-leads) |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status of ceramic LI variant] |
| Design Toolchain | Altera MAX+plus II | — |
| Usable Gates | — | 3,750 |
| Maximum Toggle Frequency | — | 40 MHz |
| Propagation Delay (tPD) | — | [DATA_NEEDED: tPD in ns at -1 grade] |
| User I/O Pins | — | [DATA_NEEDED: user I/O count for JLCC variant] |
| Package Type | — | JLCC (windowed, ceramic, UV-erasable) |
| Process Technology | — | CMOS EPROM, UV-erasable |
| Speed Grade | — | -1 |
| Nombre de broches | — | [DATA_NEEDED: pin count of LI package] |
| Niveau MSL | — | [DATA_NEEDED: MSL level] |
| Lead Free | — | [DATA_NEEDED: lead-free] |
| Programmable Interconnect | — | Programmable Interconnect Array (PIA) |
| Architecture | — | EEPROM/EPROM-based, non-volatile, instant-on |