Intel

EPF6024ABC256-2N - FLEX 6000 24K Gate FPGA | Intel | BGA-256

Name: EPF6024ABC256-2N - FLEX 6000 24K Gate FPGA | Intel | BGA-256
Brand: Intel
SKU: EPF6024ABC256-2N
Price: 22.1 USD
Availability: InStock

Référence : EPF6024ABC256-2N ✗ Fin de vie

En stock Expédié sous 1 à 3 jours ouvrés

3.3 V Vdss 256-ball BGA (BC256) Package 172 MHz Speed

À partir de $22.1 USD / unité

MOQ : 1 |

Prix mis à jour : 2026-09-11

Tarifs dégressifs

Qté	Prix unitaire	Total
1	$38.5	$38,50
10	$34.2	$342,00
100	$28.95	$2 895,00
250	$25.4	$6 350,00
500	$22.1	$11 050,00

ℹ️ Tous les prix sont en USD

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EPF6024ABC256-2N Présentation

The Intel (formerly Altera) EPF6024ABC256-2N is a member of the FLEX 6000 family of Field Programmable Gate Arrays (FPGAs) providing 24,000 gates, 1,960 logic cells (logic elements), and 218 user I/O pins in a 256-ball BGA package, operating from a 3.3 V supply. It is fabricated on a 0.42 µm CMOS process and targets low-cost, high-volume programmable logic replacement of fixed gate arrays with internal performance up to 172 MHz.

An FPGA (Field Programmable Gate Array) is a type of programmable logic device (PLD) that combines the high integration of a gate array with the design flexibility of in-system programmability. Within the broader programmable logic hierarchy, FPGAs sit above simple PLDs (SPLDs) and complex PLDs (CPLDs), providing the highest logic density and the most flexible interconnect. The EPF6024A sits in the FLEX 6000 mid-density tier of legacy Altera devices, positioned between small glue-logic CPLDs and the higher-density FLEX 10K / APEX families.

Key features of the EPF6024ABC256-2N include 196 Logic Array Blocks (LABs), JTAG Boundary Scan Test (BST) support, slew-rate controlled I/O, tri-state output buffers, and built-in PCI compliance for some I/O standards. The device supports setup times as low as 2 ns and zero hold times via the FastTrack interconnect, allowing it to be used in moderate-speed control, bus-interface, and bridging applications.

From a technical architecture standpoint, the EPF6024A combines four-input look-up table (LUT)-based logic elements, embedded array blocks (EABs) for memory functions, and a continuous FastTrack routing network. The 256-ball BGA package (BC256 designation) gives the highest I/O count in the family and is targeted at high-density glue-logic, peripheral bus bridging, and prototype-to-production conversion tasks. The "-2N" speed grade and "C" temperature grade (commercial 0 °C to 85 °C) make it suitable for industrial and commercial environments.

Typical applications include PCI bus interface glue logic, peripheral bus bridges (e.g., ISA-to-PCI, local bus expansion), telecommunication line-card control logic, industrial machine control, and high-volume consumer electronics requiring fast design changes during prototyping. The 218 user I/Os make it attractive for parallel bus and memory-interface bridging.

When designing with this part, note that it is a legacy device currently in the obsolete/EOL phase of its lifecycle. Designers should verify long-term availability, plan for second-source alternatives, and check that the MAX+PLUS II or Quartus design tools still support the chosen package variant before committing to new designs. This page synthesizes distributor pricing, drop-in FLEX 6000 alternatives, and PCB design notes not found in the legacy datasheet.

Alternatives de remplacement direct pour EPF6024ABC256-2N — même boîtier, compatible broche à broche. Les références à boîtier différent nécessitant une retouche du PCB sont exclues.

Variantes de cette série

Modèles de la même série directement compatibles avec EPF6024ABC256-2N (même facteur de forme et même empreinte) — différant par Package, Process Technology, Operating Temperature, Configuration, Internal Frequency (max).

EPF6016BC256-3

Intel

Package: 256-ball FineLine BGA

Process Technology: 0.42 µm CMOS SRAM

Operating Temperature: 0 °C to +85 °C (commercial)