PIC32MZ2025DAH176-I/2J - 200MHz 32-bit MCU with 2MB Flash | Microchip
Référence : PIC32MZ2025DAH176-I/2J ✓ Actif| Qté | Prix unitaire | Total |
|---|---|---|
| 1 | $7.33 | $7,33 |
| 10 | $6.59 | $65,90 |
| 100 | $5.92 | $592,00 |
| 500 | $5.34 | $2 670,00 |
| 1 000 | $4.83 | $4 830,00 |
PIC32MZ2025DAH176-I/2J Présentation
A 32-bit microcontroller (MCU) is a single-chip computer whose CPU datapath, registers, and ALU are 32 bits wide, enabling high code density, large linear address spaces, and single-instruction throughput closer to that of a microprocessor than legacy 8- or 16-bit MCUs. Within the broader taxonomy, this part sits in the PIC32 family (32-bit MCU) under Microcontrollers (Integrated Circuits), and the PIC32MZ DA sub-family adds an integrated 2D graphics engine and stacked DDR2 DRAM controller so that the device can drive TFT LCD panels without an external graphics ASIC or memory.
Key features include 200 MHz CPU core, 2 MB Flash, 256 KB SRAM, integrated DDR2 controller and Graphics Processor, 12-bit ADC at 18 MSPS, HS USB 2.0 OTG, dual CAN, 10/100 Ethernet MAC, up to 45 analog inputs, and 120 GPIO. The 176-LQFP exposed pad gives an industrial-grade thermal path for sustained graphics workloads.
Architecturally, the PIC32MZ DA uses a 5-stage MIPS32 microAptiv pipeline with single-cycle MAC, hardware multiply/divide, and a dedicated GPU block that offloads primitives and fills so the CPU is free to run application logic and the RTOS.
Typical applications include HMI/GUI with TFT LCD, industrial control panels, automotive infotainment, smart appliances, and medical patient-interface displays. Choose this device when you need MCU simplicity with MPU-class graphics and multimedia throughput.
For design, place at least one 0.1 µF decoupling cap per VDD pin, keep DDR2 traces length-matched per the DDR2 layout guide, and use the exposed pad with a continuous ground copper pour to meet thermal targets.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the standalone Microchip datasheet.
Alternatives de remplacement direct pour PIC32MZ2025DAH176-I/2J — même boîtier, compatible broche à broche. Les références à boîtier différent nécessitant une retouche du PCB sont exclues.
Variantes de cette série
Modèles de la même série directement compatibles avec PIC32MZ2025DAH176-I/2J (même facteur de forme et même empreinte) — différant par Graphics Controller, CAN, USB, Package, External Memory Interface.
Outil de comparaison rapide — sélectionnez des références alternatives pour une comparaison côte à côte :
PIC32MZ2025DAH176T-I/2J
✅ Remplacement direct✓ En stock
$6.35 / unité
Voir la fiche technique →PIC32MZ2025DAG176-I/2J
✅ Remplacement direct✓ En stock
$11.2 / unité
Voir la fiche technique →PIC32MZ2064DAH176-I/2J
✅ Remplacement direct ⚠️ Spécifications non vérifiées✓ En stock
$11.3 / unité
Voir la fiche technique →PIC32MZ2064DAH176T-I/2J
✅ Remplacement direct ⚠️ Spécifications non vérifiées✓ En stock
$15.51 / unité
Voir la fiche technique →PIC32MZ2025DAB176T-I/2J
✅ Remplacement direct✓ En stock
$12.4 / unité
Voir la fiche technique →PIC32MZ2025DAA176T-I/2J
✅ Remplacement direct ⚠️ Spécifications non vérifiées✓ En stock
$7.83 / unité
Voir la fiche technique →PIC32MZ2025DAH176-I/2J Valeurs maximales et caractéristiques électriques
| Core Architecture | MIPS32 microAptiv (32-bit) |
| Core Series | PIC32MZ DA (Graphics Family) |
| Maximum CPU Frequency | 200 MHz |
| Program Flash Memory | 2 MB (2M x 8) |
| SRAM | 256 KB |
| External DRAM Interface | On-chip 32 MB or external 128 MB DDR2 |
| Graphics Controller | Integrated 2D GPU + Graphics Processor |
| ADC | 12-bit, 18 MSPS, up to 45 analog inputs |
| Tension d'alimentation | 2.2 V to 3.6 V |
| Température de fonctionnement | -40C to +85C (industrial) |
| GPIO Count | 120 I/O |
| USB | HS USB 2.0 OTG |
| CAN | 2x CAN |
| Ethernet | 10/100 MAC |
| Other Connectivity | I2C, I2S, SPI, UART |
| Boîtier | 176-LQFP Exposed Pad (20x20 mm) |
| Type de montage | Surface Mount |
| Statut RoHS | Compliant |
| Lead-Free | Yes |
Configuration des broches de PIC32MZ2025DAH176-I/2J
| Broche 1 | OSC1/RC13 — External oscillator input / GPIO RC13 |
| Broche 2 | OSC2/RC15 — External oscillator output / GPIO RC15 |
| Broche 3 | VDD — Supply voltage 2.2-3.6V |
| Broche 4 | VSS — Ground reference |
| Broche 5 | RA0 — GPIO PORTA bit 0 |
| Broche 6 | RA1 — GPIO PORTA bit 1 |
| Broche 7 | RA2 — GPIO PORTA bit 2 |
| Broche 8 | RA3 — GPIO PORTA bit 3 |
| Broche 9 | RA4 — GPIO PORTA bit 4 |
| Broche 10 | RA5 — GPIO PORTA bit 5 |
| Broche 11 | VDD — Supply voltage |
| Broche 12 | VSS — Ground |
| Broche 13 | RB0 — GPIO PORTB bit 0 / PGED1 |
| Broche 14 | RB1 — GPIO PORTB bit 1 / PGEC1 |
| Broche 15 | RB2 — GPIO PORTB bit 2 |
| Broche 16 | RB3 — GPIO PORTB bit 3 |
| Broche 17 | RB4 — GPIO PORTB bit 4 |
| Broche 18 | RB5 — GPIO PORTB bit 5 |
| Broche 19 | RB6 — GPIO PORTB bit 6 |
| Broche 20 | RB7 — GPIO PORTB bit 7 |
| Broche 21 | VDD — Supply voltage |
| Broche 22 | VSS — Ground |
| Broche 23 | RC0 — GPIO PORTC bit 0 |
| Broche 24 | RC1 — GPIO PORTC bit 1 |
| Broche 25 | RC2 — GPIO PORTC bit 2 |
| Broche 26 | RC3 — GPIO PORTC bit 3 |
| Broche 27 | RC4 — GPIO PORTC bit 4 |
| Broche 28 | RC5 — GPIO PORTC bit 5 |
| Broche 29 | RC6 — GPIO PORTC bit 6 |
| Broche 30 | RC7 — GPIO PORTC bit 7 |
| Broche 31 | VDD — Supply voltage |
| Broche 32 | VSS — Ground |
| Broche 33 | RD0 — GPIO PORTD bit 0 |
| Broche 34 | RD1 — GPIO PORTD bit 1 |
| Broche 35 | RD2 — GPIO PORTD bit 2 |
| Broche 36 | RD3 — GPIO PORTD bit 3 |
| Broche 37 | RD4 — GPIO PORTD bit 4 |
| Broche 38 | RD5 — GPIO PORTD bit 5 |
| Broche 39 | RD6 — GPIO PORTD bit 6 |
| Broche 40 | RD7 — GPIO PORTD bit 7 |
| Broche 41 | VDD — Supply voltage |
| Broche 42 | VSS — Ground |
| Broche 43 | RE0 — GPIO PORTE bit 0 |
| Broche 44 | RE1 — GPIO PORTE bit 1 |
| Broche 45 | RE2 — GPIO PORTE bit 2 |
| Broche 46 | RE3 — GPIO PORTE bit 3 |
| Broche 47 | RE4 — GPIO PORTE bit 4 |
| Broche 48 | RE5 — GPIO PORTE bit 5 |
| Broche 49 | RE6 — GPIO PORTE bit 6 |
| Broche 50 | RE7 — GPIO PORTE bit 7 |
| Broche 51 | VDD — Supply voltage |
| Broche 52 | VSS — Ground |
| Broche 53 | RF0 — GPIO PORTF bit 0 |
| Broche 54 | RF1 — GPIO PORTF bit 1 |
| Broche 55 | RF2 — GPIO PORTF bit 2 |
| Broche 56 | RF3 — GPIO PORTF bit 3 |
| Broche 57 | RF4 — GPIO PORTF bit 4 |
| Broche 58 | RF5 — GPIO PORTF bit 5 |
| Broche 59 | RF6 — GPIO PORTF bit 6 |
| Broche 60 | RF7 — GPIO PORTF bit 7 |
| Broche 61 | VDD — Supply voltage |
| Broche 62 | VSS — Ground |
| Broche 63 | RG0 — GPIO PORTG bit 0 |
| Broche 64 | RG1 — GPIO PORTG bit 1 |
| Broche 65 | RG2 — GPIO PORTG bit 2 |
| Broche 66 | RG3 — GPIO PORTG bit 3 |
| Broche 67 | RG6 — GPIO PORTG bit 6 |
| Broche 68 | RG7 — GPIO PORTG bit 7 |
| Broche 69 | RG8 — GPIO PORTG bit 8 |
| Broche 70 | RG9 — GPIO PORTG bit 9 |
| Broche 71 | VDD — Supply voltage |
| Broche 72 | VSS — Ground |
| Broche 73 | RH0 — GPIO PORTH bit 0 |
| Broche 74 | RH1 — GPIO PORTH bit 1 |
| Broche 75 | RH2 — GPIO PORTH bit 2 |
| Broche 76 | RH3 — GPIO PORTH bit 3 |
| Broche 77 | RH4 — GPIO PORTH bit 4 |
| Broche 78 | RH5 — GPIO PORTH bit 5 |
| Broche 79 | RH6 — GPIO PORTH bit 6 |
| Broche 80 | RH7 — GPIO PORTH bit 7 |
| Broche 81 | VDD — Supply voltage |
| Broche 82 | VSS — Ground |
| Broche 83 | RJ0 — GPIO PORTJ bit 0 |
| Broche 84 | RJ1 — GPIO PORTJ bit 1 |
| Broche 85 | RJ2 — GPIO PORTJ bit 2 |
| Broche 86 | RJ3 — GPIO PORTJ bit 3 |
| Broche 87 | RJ4 — GPIO PORTJ bit 4 |
| Broche 88 | RJ5 — GPIO PORTJ bit 5 |
| Broche 89 | RJ6 — GPIO PORTJ bit 6 |
| Broche 90 | RJ7 — GPIO PORTJ bit 7 |
| Broche 91 | VDD — Supply voltage |
| Broche 92 | VSS — Ground |
| Broche 93 | RK0 — GPIO PORTK bit 0 |
| Broche 94 | RK1 — GPIO PORTK bit 1 |
| Broche 95 | RK2 — GPIO PORTK bit 2 |
| Broche 96 | RK3 — GPIO PORTK bit 3 |
| Broche 97 | RK4 — GPIO PORTK bit 4 |
| Broche 98 | RK5 — GPIO PORTK bit 5 |
| Broche 99 | RK6 — GPIO PORTK bit 6 |
| Broche 100 | RK7 — GPIO PORTK bit 7 |
| Broche 101 | VDD — Supply voltage |
| Broche 102 | VSS — Ground |
| Broche 103 | RL0 — GPIO PORTL bit 0 |
| Broche 104 | RL1 — GPIO PORTL bit 1 |
| Broche 105 | RL2 — GPIO PORTL bit 2 |
| Broche 106 | RL3 — GPIO PORTL bit 3 |
| Broche 107 | RL4 — GPIO PORTL bit 4 |
| Broche 108 | RL5 — GPIO PORTL bit 5 |
| Broche 109 | RL6 — GPIO PORTL bit 6 |
| Broche 110 | RL7 — GPIO PORTL bit 7 |
| Broche 111 | VDD — Supply voltage |
| Broche 112 | VSS — Ground |
| Broche 113 | DAC1/A0 — DAC output or analog input |
| Broche 114 | A1 — Analog input 1 |
| Broche 115 | A2 — Analog input 2 |
| Broche 116 | A3 — Analog input 3 |
| Broche 117 | A4 — Analog input 4 |
| Broche 118 | A5 — Analog input 5 |
| Broche 119 | A6 — Analog input 6 |
| Broche 120 | A7 — Analog input 7 |
| Broche 121 | VDD — Supply voltage |
| Broche 122 | VSS — Ground |
| Broche 123 | A8 — Analog input 8 |
| Broche 124 | A9 — Analog input 9 |
| Broche 125 | A10 — Analog input 10 |
| Broche 126 | A11 — Analog input 11 |
| Broche 127 | A12 — Analog input 12 |
| Broche 128 | A13 — Analog input 13 |
| Broche 129 | A14 — Analog input 14 |
| Broche 130 | A15 — Analog input 15 |
| Broche 131 | VDD — Supply voltage |
| Broche 132 | VSS — Ground |
| Broche 133 | DDR_DQ0 — DDR2 data bit 0 (or stacked DRAM IO) |
| Broche 134 | DDR_DQ1 — DDR2 data bit 1 (or stacked DRAM IO) |
| Broche 135 | DDR_DQ2 — DDR2 data bit 2 (or stacked DRAM IO) |
| Broche 136 | DDR_DQ3 — DDR2 data bit 3 (or stacked DRAM IO) |
| Broche 137 | DDR_DQ4 — DDR2 data bit 4 (or stacked DRAM IO) |
| Broche 138 | DDR_DQ5 — DDR2 data bit 5 (or stacked DRAM IO) |
| Broche 139 | DDR_DQ6 — DDR2 data bit 6 (or stacked DRAM IO) |
| Broche 140 | DDR_DQ7 — DDR2 data bit 7 (or stacked DRAM IO) |
| Broche 141 | VDD — Supply voltage |
| Broche 142 | VSS — Ground |
| Broche 143 | DDR_DQS — DDR2 data strobe (or stacked DRAM IO) |
| Broche 144 | DDR_CK — DDR2 clock (or stacked DRAM IO) |
| Broche 145 | DDR_CKE — DDR2 clock enable (or stacked DRAM IO) |
| Broche 146 | DDR_CS — DDR2 chip select (or stacked DRAM IO) |
| Broche 147 | DDR_RAS — DDR2 row address strobe (or stacked DRAM IO) |
| Broche 148 | DDR_CAS — DDR2 column address strobe (or stacked DRAM IO) |
| Broche 149 | DDR_WE — DDR2 write enable (or stacked DRAM IO) |
| Broche 150 | DDR_BA0 — DDR2 bank address 0 (or stacked DRAM IO) |
| Broche 151 | VDD — Supply voltage |
| Broche 152 | VSS — Ground |
| Broche 153 | DDR_A0 — DDR2 address bit 0 (or stacked DRAM IO) |
| Broche 154 | DDR_A1 — DDR2 address bit 1 (or stacked DRAM IO) |
| Broche 155 | DDR_A2 — DDR2 address bit 2 (or stacked DRAM IO) |
| Broche 156 | DDR_A3 — DDR2 address bit 3 (or stacked DRAM IO) |
| Broche 157 | DDR_A4 — DDR2 address bit 4 (or stacked DRAM IO) |
| Broche 158 | DDR_A5 — DDR2 address bit 5 (or stacked DRAM IO) |
| Broche 159 | DDR_A6 — DDR2 address bit 6 (or stacked DRAM IO) |
| Broche 160 | DDR_A7 — DDR2 address bit 7 (or stacked DRAM IO) |
| Broche 161 | VDD — Supply voltage |
| Broche 162 | VSS — Ground |
| Broche 163 | DDR_A8 — DDR2 address bit 8 (or stacked DRAM IO) |
| Broche 164 | DDR_A9 — DDR2 address bit 9 (or stacked DRAM IO) |
| Broche 165 | DDR_A10 — DDR2 address bit 10 (or stacked DRAM IO) |
| Broche 166 | DDR_A11 — DDR2 address bit 11 (or stacked DRAM IO) |
| Broche 167 | DDR_A12 — DDR2 address bit 12 (or stacked DRAM IO) |
| Broche 168 | USB_DP — HS USB D+ (or stacked DRAM IO) |
| Broche 169 | USB_DM — HS USB D- (or stacked DRAM IO) |
| Broche 170 | VBUS — HS USB VBUS detect (or stacked DRAM IO) |
| Broche 171 | VDD_USB — HS USB transceiver supply (or stacked DRAM IO) |
| Broche 172 | VSS — Ground |
| Broche 173 | TCK — JTAG test clock |
| Broche 174 | TMS — JTAG test mode select |
| Broche 175 | TDI — JTAG test data in |
| Broche 176 | TDO — JTAG test data out |
Applications typiques
PIC32MZ2025DAH176-I/2J convient pour 6 applications: Industrial HMI with TFT LCD, Automotive Infotainment Sub-Display, Smart Appliance Control Panel, Medical Patient-Interface Display, Building Automation Touch Panels, Point-of-Sale Terminal with Color Display.
Industrial HMI with TFT LCD
The PIC32MZ2025DAH176-I/2J is purpose-built for industrial HMI panels driving TFT LCDs up to WVGA resolution. Its integrated 2D Graphics Processor offloads primitives, line draws, blits, and color fills from the CPU, allowing the MIPS32 microAptiv core to run the application logic and RTOS concurrently. The on-chip 32 MB stacked DDR2 provides ample frame buffer for multi-layer GUIs without an external SDRAM chip, simplifying PCB layout. With 120 GPIO, multiple SPI ports for display and touch controllers, and 12-bit 18 MSPS ADC for sensor input, this MCU replaces an MPU+external-GPU+external-SDRAM stack with a single chip. Compared to adding a discrete GPU ASIC, integrating the graphics block reduces BOM cost, PCB area, and firmware complexity while still delivering smooth 60 fps UI updates.
Recommandé
Automotive Infotainment Sub-Display
The PIC32MZ2025DAH176-I/2J suits automotive infotainment sub-displays such as HVAC panels, rear-seat entertainment touch screens, and instrument-cluster secondary zones. Its 200 MHz MIPS32 core runs real-time UI code while the integrated GPU renders gauge graphics, and HS USB 2.0 OTG provides connectivity to the head unit. Dual CAN interfaces integrate with vehicle CAN-FD networks, while 12-bit ADC inputs handle analog sensor signals. The -40C to +85C industrial temperature range covers cabin electronics. Compared to discrete MPU designs, integrating DDR2 controller and GPU cuts PCB area, BOM count, and EMI complexity. The 176-LQFP exposed pad simplifies thermal management in enclosed automotive enclosures.
Recommandé
Smart Appliance Control Panel
The PIC32MZ2025DAH176-I/2J powers the touch-screen control panel on premium smart appliances: washing machines, ovens, refrigerators, and robotic vacuums. The integrated graphics engine drives the user-facing TFT LCD at 60 fps with animated icons and progress indicators, while the MIPS32 core handles the appliance state machine, motor control loop, and Wi-Fi/BLE co-processor management via UART/SPI. The 120 GPIO count allows direct interface with capacitive touch controllers, segment drivers, and discrete indicators without external I/O expanders. Its 2 MB Flash supports full HMI firmware stacks including asset libraries, multilingual resources, and OTA update slots. Compared to discrete MCU plus external LCD controller, the integrated solution reduces BOM and accelerates time to market.
Recommandé
Medical Patient-Interface Display
The PIC32MZ2025DAH176-I/2J is appropriate for medical patient-interface displays such as infusion pump screens, patient monitor secondary displays, and diagnostic device control panels. Its 12-bit 18 MSPS ADC with up to 45 analog inputs provides precise digitization of sensor signals, while the integrated GPU renders smooth trend graphs and waveform visualizations. The MIPS32 core handles the safety-critical logic while the GPU refreshes the display in parallel. With HS USB and Ethernet, the device connects to hospital networks and bedside monitoring systems. The 2 MB Flash supports full IEC 62304-compliant firmware with bootloader and self-test routines. Compared to discrete MPU designs, the integrated graphics and DDR2 controller reduce PCB complexity and improve reliability.
Recommandé
Building Automation Touch Panels
The PIC32MZ2025DAH176-I/2J integrates the requirements of building automation touch panels: a graphical UI for floor plans, lighting scenes, and HVAC control; Ethernet connectivity for BACnet/Modbus-TCP networks; and CAN/RS-485 for fieldbus integration. The integrated GPU renders floor plans and lighting animations smoothly, while the MIPS32 core handles the building automation protocol stack and logic. With 2 MB Flash, the device stores full floor plans, multilingual strings, and OTA update slots. Compared to running a Linux MPU, the PIC32MZ2025DAH176-I/2J boots in under 100 ms, supports deterministic real-time response, and avoids the security maintenance burden of an OS.
Recommandé
Point-of-Sale Terminal with Color Display
The PIC32MZ2025DAH176-I/2J powers compact point-of-sale terminals that need a color TFT for menu display, signature capture, and QR code rendering. The integrated 2D GPU accelerates QR/barcode generation and screen transitions, while the MIPS32 core handles payment processing, encryption, and USB peripherals. HS USB 2.0 OTG connects to fiscal printers and external barcode scanners; Ethernet provides cloud payment gateway connectivity. With 256 KB SRAM, transaction buffers and cryptographic state fit comfortably. Compared to MPU-based POS designs, the integrated solution reduces BOM cost and enables fanless, compact enclosures with longer MTBF.
Recommandé
Récapitulatif des produits recommandés
Données de référence d'ingénierie pour PIC32MZ2025DAH176-I/2J — comparaison, recommandations de conception et informations de conformité.
Guide de sélection
Comparaison avec les alternatives
| Paramètre | Ce produit | PIC32MZ2025DAH176T-I/2J | PIC32MZ2025DAG176-I/2J | PIC32MZ2064DAH176-I/2J | PIC32MZ2064DAH176T-I/2J | PIC32MZ2025DAB176T-I/2J | PIC32MZ2025DAA176T-I/2J |
|---|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 176-LQFP (20x20) Exposed Pad | 176-LQFP (20x20) - same | 176-LQFP (20x20) - same | 176-LQFP (20x20) - same | 176-LQFP (20x20) - same | 176-LQFP (20x20) - same | 176-LQFP (20x20) - same |
| Core | MIPS32 microAptiv 200 MHz | MIPS32 microAptiv 200 MHz | MIPS32 microAptiv 200 MHz | MIPS32 microAptiv 200 MHz | MIPS32 microAptiv 200 MHz | MIPS32 microAptiv 200 MHz | MIPS32 microAptiv 200 MHz |
| Flash | 2 MB | 2 MB | 2 MB | 2 MB | 2 MB | 2 MB | 2 MB |
| SRAM | 256 KB | 256 KB | 256 KB | 640 KB | 640 KB | 256 KB | 256 KB |
| Stacked DRAM | 32 MB on-chip (H suffix) | 32 MB on-chip (H) | Smaller G designator DRAM | 32 MB on-chip (H) | 32 MB on-chip (H) | Different B designator DRAM | Different A designator DRAM |
| GPU | Yes (integrated 2D) | Yes (integrated 2D) | Yes (integrated 2D) | Yes (integrated 2D) | Yes (integrated 2D) | Yes (integrated 2D) | Yes (integrated 2D) |
| Packaging | Tray | Tape & Reel | Tray | Tray | Tape & Reel | Tape & Reel | Tape & Reel |
Principaux différenciateurs
- Highest on-chip stacked DRAM density in family (vs PIC32MZ2025DAG176-I/2J)
- Identical footprint with 2.5x SRAM upgrade available (vs PIC32MZ2064DAH176-I/2J)
- Tape-and-reel variant for high-volume SMT (vs PIC32MZ2025DAH176T-I/2J)
Notes de conception
Estimated: the PIC32MZ2025DAH176-I/2J can draw 100-300 mA at 200 MHz with full DDR2 and GPU utilization. Place one 0.1 µF + one 4.7 µF ceramic capacitor within 5 mm of every VDD/VSS pin pair, and use a 4-layer PCB with a dedicated ground plane. The on-chip DDR2 LDO requires its own 1 µF bypass cap at the VDDR_CAP pin per Microchip's DDR2 routing guide.
DDR2 signals (DQ, DQS, CK, CKE, CS, RAS, CAS, WE, BA, A) require length-matched routing: data group ±25 mils, address/control ±50 mils, with proper series termination. Use fly-by topology if external DDR2 is fitted; the on-chip stacked DRAM routes internally and does not require external length matching. Maintain 50 ohm controlled impedance on all DDR2 nets.
Estimated: at full CPU+GPU load, the die dissipates ~0.8-1.2 W. The 176-LQFP exposed pad must be soldered to a copper pour of at least 1 square inch connected to ground. Without the exposed pad, junction temperature may exceed 125 C at industrial ambient. Use thermal vias under the pad to inner ground planes.
Do not skip configuring the FBS bits to enable the I/O port multiplexing needed for HS USB or Ethernet - leaving pins in default analog state will cause peripherals to fail. Also, the JTAG pins TCK/TMS/TDI/TDO must be left disconnected or pulled appropriately in production to avoid debug intrusion.
Informations de conformité
RoHS and REACH compliant per Microchip product page. Not AEC-Q100 qualified - select AEC-Q100 qualified PIC32 variants for automotive safety-critical applications. Conflict minerals declaration per Microchip corporate policy.
