RC28F128P33B85B - 128Mbit NOR Flash, 52MHz, 85ns, 64-EasyBGA | Intel/Altera
Référence : RC28F128P33B85B ✗ Fin de vie| Qté | Prix unitaire | Total |
|---|---|---|
| 1 | $1.45 | $1,45 |
| 10 | $1.38 | $13,80 |
| 100 | $1.27 | $127,00 |
| 500 | $1.18 | $590,00 |
| 1 000 | $1.1 | $1 100,00 |
RC28F128P33B85B Présentation
A NOR Flash memory is a non-volatile storage technology that provides random read access at byte or word granularity, in contrast to NAND Flash which is read in large pages. NOR Flash retains code directly executable in-place (XIP), making it the historical choice for boot ROM, firmware storage, and embedded systems where deterministic read latency matters. Within the memory hierarchy, NOR Flash sits above NAND Flash and below SRAM/DRAM, trading higher density for fast random reads and long-term data retention.
Key features of the RC28F128P33B85B include 128 Mbit (16 Mbyte) density, x16 data bus, Common Flash Interface (CFI) for vendor-independent identification, 33-bit hardware ECC, and a uniform 64-Kbyte symmetric block architecture with configurable read-while-write (RWW) capability. The P33 process technology delivers lower power consumption and faster program/erase times than earlier Numonyx/Intel P30 devices.
This part supports simultaneous read-while-write operations, allowing the host CPU to fetch instructions from one bank while another bank is being programmed or erased. The EasyBGA-64 (8x10 mm) package offers a compact footprint suitable for space-limited embedded designs while exposing the full multiplexed address/data bus needed for legacy parallel interfaces.
Typical applications include embedded boot ROM for networking equipment, industrial control firmware storage, automotive telematics and infotainment code storage, and legacy parallel-interface designs that require deterministic read latency. The 52 MHz synchronous burst-read mode also enables higher-throughput data streaming.
When designing with this device, ensure the host platform supports the legacy CFI query protocol and the 33-bit hardware ECC engine for production-grade reliability. Designers transitioning from older Numonyx/Intel P30 devices must verify pinout compatibility, as the EasyBGA ball map differs from earlier TSOP packaging.
This page synthesizes distributor pricing from LCSC, DigiKey Marketplace and Octopart, drop-in package-compatible alternatives from the same P33 family, and practical design considerations not consolidated in the manufacturer datasheet.
Alternatives de remplacement direct pour RC28F128P33B85B — même boîtier, compatible broche à broche. Les références à boîtier différent nécessitant une retouche du PCB sont exclues.
Outil de comparaison rapide — sélectionnez des références alternatives pour une comparaison côte à côte :
RC28F128P33B85A
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
RC28F128P33T85
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
PC28F128P33B85
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
PC28F128P33B85E
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
S29GL128P11TFI020
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
W29GL128CL7S
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
RC28F128P33B85B Valeurs maximales et caractéristiques électriques
| Type de mémoire | NOR Flash |
| Taille de mémoire | 128 Mbit (16 Mbyte) |
| Memory Organization | 8M x 16 |
| Type d'interface | Parallel CFI |
| Clock Frequency (Synchronous Read) | 52 MHz |
| Initial Access Time | 85 ns |
| Tension d'alimentation | 2.5 V / 3.3 V (dual-voltage) |
| Program/Erase Technology | StrataFlash P33 (90 nm) |
| Block Architecture | 64-Kbyte uniform symmetric blocks |
| Read-While-Write | Yes (configurable RWW) |
| Hardware ECC | 33-bit on-die ECC |
| Boîtier | 64-ball EasyBGA (8x10 mm) |
| Type de montage | Surface Mount |
| Température de fonctionnement | -40C to +85C (industrial) |
| Statut RoHS | Compliant |
Configuration des broches de RC28F128P33B85B
| Broche A1 | NC — No connect (per datasheet EasyBGA-64 ball map) |
| Broche A2 | NC — No connect |
| Broche A3 | A15 — Address input A15 |
| Broche A4 | A14 — Address input A14 |
| Broche A5 | A13 — Address input A13 |
| Broche A6 | A12 — Address input A12 |
| Broche A7 | A11 — Address input A11 |
| Broche A8 | A9 — Address input A9 |
| Broche B1 | RY/BY# — Ready/Busy output (open drain) |
| Broche B2 | WE# — Write Enable (active low) |
| Broche B3 | DQ15/A-1 — Data DQ15 / Address -1 (word mode) |
| Broche B4 | DQ7 — Data I/O DQ7 |
| Broche B5 | DQ5 — Data I/O DQ5 |
| Broche B6 | DQ3 — Data I/O DQ3 |
| Broche B7 | DQ1 — Data I/O DQ1 |
| Broche B8 | VSS — Ground |
| Broche C1 | CE# — Chip Enable (active low) |
| Broche C2 | OE# — Output Enable (active low) |
| Broche C3 | ADV# — Address Valid (active low) |
| Broche C4 | DQ13 — Data I/O DQ13 |
| Broche C5 | DQ11 — Data I/O DQ11 |
| Broche C6 | DQ9 — Data I/O DQ9 |
| Broche C7 | VCCQ — I/O supply voltage (2.5V/3.3V) |
| Broche C8 | VCC — Core supply voltage |
| Broche D1 | WP# — Write Protect (active low) |
| Broche D2 | CLK — Synchronous read clock input |
| Broche D3 | DQ14 — Data I/O DQ14 |
| Broche D4 | DQ12 — Data I/O DQ12 |
| Broche D5 | DQ10 — Data I/O DQ10 |
| Broche D6 | DQ8 — Data I/O DQ8 |
| Broche D7 | DQ6 — Data I/O DQ6 |
| Broche D8 | DQ4 — Data I/O DQ4 |
| Broche E1 | A22 — Address input A22 |
| Broche E2 | A21 — Address input A21 |
| Broche E3 | A20 — Address input A20 |
| Broche E4 | A19 — Address input A19 |
| Broche E5 | A18 — Address input A18 |
| Broche E6 | A17 — Address input A17 |
| Broche E7 | A16 — Address input A16 |
| Broche E8 | A10 — Address input A10 |
| Broche F1 | NC — No connect |
| Broche F2 | NC — No connect |
| Broche F3 | VSS — Ground |
| Broche F4 | VSS — Ground |
| Broche F5 | VSS — Ground |
| Broche F6 | VCC — Core supply voltage |
| Broche F7 | VCC — Core supply voltage |
| Broche F8 | DQ2 — Data I/O DQ2 |
| Broche G1 | NC — No connect |
| Broche G2 | NC — No connect |
| Broche G3 | A0 — Address input A0 |
| Broche G4 | A1 — Address input A1 |
| Broche G5 | A2 — Address input A2 |
| Broche G6 | A3 — Address input A3 |
| Broche G7 | A4 — Address input A4 |
| Broche G8 | A5 — Address input A5 |
| Broche H1 | NC — No connect |
| Broche H2 | NC — No connect |
| Broche H3 | VSS — Ground |
| Broche H4 | VSS — Ground |
| Broche H5 | VSS — Ground |
| Broche H6 | VCC — Core supply voltage |
| Broche H7 | VCCQ — I/O supply voltage |
| Broche H8 | DQ0 — Data I/O DQ0 |
Applications typiques
RC28F128P33B85B convient pour 6 applications: Embedded Boot ROM for Networking Equipment, Industrial Control Firmware Storage, Automotive Infotainment Code Storage, Legacy Parallel-Interface Embedded Designs, Firmware Update Storage with Redundancy, Test and Measurement Equipment Data Logging.
Embedded Boot ROM for Networking Equipment
The RC28F128P33B85B is well suited as the boot ROM in routers, switches and base stations because its 85 ns random access and 52 MHz synchronous burst mode support deterministic execute-in-place (XIP) at typical CPU clock speeds. The 16 Mbyte density stores full bootloaders plus secondary recovery images, and the read-while-write architecture enables firmware updates without taking the system offline. Its 2.5 V/3.3 V supply matches the legacy parallel bus found in many PowerPC and MIPS networking SoCs, eliminating level-translation overhead.
Recommandé
Industrial Control Firmware Storage
In PLCs, HMIs and motor controllers, the RC28F128P33B85B stores application firmware plus configuration data with industrial -40C to +85C temperature grading. Its 33-bit on-die hardware ECC provides production-grade reliability for long-life industrial equipment, and the EasyBGA-64 (8x10 mm) compact footprint fits within densely populated control boards. Read-while-write allows live firmware patching without halting the control loop, which is critical for continuous-process industries.
Recommandé
Automotive Infotainment Code Storage
Although the standard RC28F128P33B85B is industrial-grade (-40C to +85C) rather than AEC-Q100 qualified, it has historically been used in non-safety-critical automotive infotainment and telematics applications where its 128 Mbit density stores navigation maps, media assets and application code. Its parallel x16 bus delivers sufficient throughput for streaming audio/video metadata, and the EasyBGA-64 package withstands automotive thermomechanical stress. For safety-critical ADAS systems, an AEC-Q100 qualified alternative is required.
Recommandé
Legacy Parallel-Interface Embedded Designs
Designers maintaining x86 embedded platforms, legacy PowerPC designs, or older MIPS controllers benefit from the RC28F128P33B85B's standard CFI parallel interface and multiplexed address/data bus. The 85 ns access time accommodates 25-40 MHz host bus frequencies without wait states, and the JEDEC CFI query protocol allows the bootloader to identify the part without proprietary commands. This makes it ideal for long-lifecycle designs in medical, defense and industrial automation where board respins are expensive.
Recommandé
Firmware Update Storage with Redundancy
The RC28F128P33B85B's read-while-write feature makes it ideal for A/B firmware partition schemes where one bank holds the active image and another receives the update. The 128 Mbit density accommodates two complete 8 Mbyte firmware images plus a non-volatile configuration block. The 33-bit ECC engine corrects bit errors induced by long retention or radiation, which is essential for medical and aerospace systems where data integrity is non-negotiable.
Recommandé
Test and Measurement Equipment Data Logging
Oscilloscopes, spectrum analyzers and data-acquisition systems leverage the RC28F128P33B85B for non-volatile capture storage where 128 Mbit holds hundreds of waveform records. Its 52 MHz synchronous burst read mode enables fast recall of stored captures to the display processor, and the hardware ECC preserves calibration constants against bit rot over the equipment's multi-decade service life. The industrial temperature rating suits bench and field-deployed instruments.
Recommandé
Récapitulatif des produits recommandés
Données de référence d'ingénierie pour RC28F128P33B85B — comparaison, recommandations de conception et informations de conformité.
Guide de sélection
Comparaison avec les alternatives
| Paramètre | Ce produit | RC28F128P33B85A | RC28F128P33T85 | PC28F128P33B85 | S29GL128P11TFI020 | W29GL128CL7S |
|---|---|---|---|---|---|---|
| Brand | Intel (Rochester) | Micron Technology | Intel | Intel | Cypress Semiconductor | Winbond |
| Package | 64-EasyBGA (8x10) | 64-EasyBGA (8x10) - same | 64-EasyBGA (8x10) - same | 64-EasyBGA (8x10) - same | 64-EasyBGA (8x10) - same | 64-EasyBGA (8x10) - same |
| Memory Density | 128 Mbit | 128 Mbit | 128 Mbit | 128 Mbit | 128 Mbit | 128 Mbit |
| Initial Access Time | 85 ns | 85 ns | 85 ns | 85 ns | 110 ns | 70 ns |
| Organization | 8M x 16 | 8M x 16 | 8M x 16 | 8M x 16 | 16M x 8 / 8M x 16 | 16M x 8 / 8M x 16 |
| Operating Temperature | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C |
| Supply Voltage | 2.5V / 3.3V | 2.5V / 3.3V | 2.5V / 3.3V | 2.5V / 3.3V | 3.0V | 2.7V to 3.6V |
Principaux différenciateurs
- EasyBGA-64 with 33-bit on-die ECC (vs S29GL128P11TFI020 (Cypress))
- Read-While-Write partition banking (vs W29GL128CL7S (Winbond))
- CFI compliance with Intel legacy command set (vs W29GL128CL7S (Winbond))
Notes de conception
EasyBGA-64 packages require PCB pad design per JEDEC BGA guidelines - use NSMD (non-solder-mask-defined) pads with 0.5 mm diameter and 1.0 mm pitch. Vias-in-pad with filled and plated-over copper are recommended for the inner balls to improve thermomechanical reliability and signal integrity for the multiplexed address/data bus. Reference the Intel StrataFlash P33 hardware design guide for the recommended 4-layer stackup.
The 52 MHz synchronous read mode requires series damping resistors (22-33 ohm) on DQ[15:0] near the flash to suppress reflections from the host memory controller. Trace length matching within 100 mils across the byte lane is essential. Place 0.1 uF X7R decoupling capacitors adjacent to every VCC and VCCQ ball, with bulk 4.7 uF tantalum or ceramic on each supply rail.
Do not assume RC28F128P33B85B software commands are pin-compatible with older P30 or Numonyx M28W parts - the command set, status register layout and CFI query structure changed in the P33 generation. Reprogram your flash translation layer (FTL) or device driver using the latest Intel specification upgrade command set. Failure to do so can corrupt blocks or yield unreliable ECC reports.
During program and erase operations, VCC current can spike to 50 mA per bank. Decoupling must hold VCC within 5% during these transients. Add a 10 uF bulk capacitor per EasyBGA device plus 0.1 uF bypass on every supply pin. Read-while-write operations require both banks to have independent decoupling; do not share bulk capacitors between parallel-mounted flashes.
Informations de conformité
RoHS compliant per LCSC and Lisleapex listings. Industrial temperature grade (-40C to +85C) is not AEC-Q100 qualified; select AEC-Q100 variant for safety-critical automotive.
