A3PE3000-FG896 vs A3PE3000L-FGG896M तुलना
विस्तृत दोनों ओर की तुलना A3PE3000-FG896 द्वारा Microchip Technology और A3PE3000L-FGG896M द्वारा Microchip Technology. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Microchip Technology
A3PE3000-FG896 - ProASIC3E Flash FPGA 620 I/O | Microchip
A3PE3000-FG896 ✓ सक्रियMicrochip Technology
A3PE3000L-FGG896M - 3M-Gate Low-Power Flash FPGA | Microchip
A3PE3000L-FGG896M ✓ सक्रियविशेषता तुलना
| पैरामीटर | A3PE3000-FG896 | A3PE3000L-FGG896M |
|---|---|---|
| ब्रांड | Microchip Technology | Microchip Technology |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | सक्रिय | सक्रिय |
| Family | ProASIC3E | ProASIC3L (Flash-based FPGA) |
| System Gates | 3000000 | 3,000,000 |
| Number of I/O | 620 | — |
| Embedded Memory | 516096 bit | — |
| Maximum System Frequency | 231 MHz | — |
| Process Technology | 130 nm | 130-nm, 7-layer metal (6 copper), flash-based CMOS |
| Core Supply Voltage | 1.5 V | — |
| Configuration Memory | Flash (non-volatile, reprogrammable) | — |
| Logic Element Count (per distributor listing) | [DATA_NEEDED: verified LE/KLE count] | — |
| पैकेज | 896-BGA (FBGA) | 896-ball FBGA (FGG896), 1 mm pitch |
| माउंटिंग स्टाइल | SMD/SMT | — |
| ऑपरेटिंग तापमान | 0 C to +70 C | 0 to 70 C |
| Packaging | Tray | — |
| Speed Grade | Standard (-) | — |
| Architecture | VersaTile 3-input LUT / D flip-flop / latch | — |
| Global Networks | VersaNet low-skew high-fanout networks | — |
| RoHS स्थिति | Non-green package (FG prefix; FGG variants are RoHS green) | — |
| Logic Cells | — | 75,264 |
| User I/Os | — | Up to 616 (620 per DigiKey listing) |
| Embedded SRAM | — | 504 kbits true dual-port |
| Core Voltage | — | 1.2 V to 1.5 V |
| सप्लाई वोल्टेज | — | 1.5 V |
| Logic Family | — | CMOS |
| माउंटिंग प्रकार | — | Surface Mount |
| Configuration | — | Non-volatile flash, live-at-power-up Level 0, single-chip |
| Low-Power Feature | — | Flash*Freeze technology |
| Boundary Scan | — | IEEE 1149.1 (JTAG) |
| Input Features | — | Schmitt trigger option on single-ended inputs; weak pull-up/pull-down |