A3PE3000-FG896 vs A3PE3000L-FGG896M Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng A3PE3000-FG896 sa pamamagitan ng Microchip Technology at A3PE3000L-FGG896M sa pamamagitan ng Microchip Technology. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Microchip Technology
A3PE3000-FG896 - ProASIC3E Flash FPGA 620 I/O | Microchip
A3PE3000-FG896 ✓ NakahandaMicrochip Technology
A3PE3000L-FGG896M - 3M-Gate Low-Power Flash FPGA | Microchip
A3PE3000L-FGG896M ✓ NakahandaPagsanggunian na paghahambing
| Parametro | A3PE3000-FG896 | A3PE3000L-FGG896M |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | ProASIC3E | ProASIC3L (Flash-based FPGA) |
| System Gates | 3000000 | 3,000,000 |
| Number of I/O | 620 | — |
| Embedded Memory | 516096 bit | — |
| Maximum System Frequency | 231 MHz | — |
| Process Technology | 130 nm | 130-nm, 7-layer metal (6 copper), flash-based CMOS |
| Core Supply Voltage | 1.5 V | — |
| Configuration Memory | Flash (non-volatile, reprogrammable) | — |
| Logic Element Count (per distributor listing) | [DATA_NEEDED: verified LE/KLE count] | — |
| Packhaging | 896-BGA (FBGA) | 896-ball FBGA (FGG896), 1 mm pitch |
| Style ng Pagpapasok | SMD/SMT | — |
| Temperature na Operasyon | 0 C to +70 C | 0 to 70 C |
| Packaging | Tray | — |
| Speed Grade | Standard (-) | — |
| Architecture | VersaTile 3-input LUT / D flip-flop / latch | — |
| Global Networks | VersaNet low-skew high-fanout networks | — |
| Tindminan RoHS | Non-green package (FG prefix; FGG variants are RoHS green) | — |
| Logic Cells | — | 75,264 |
| User I/Os | — | Up to 616 (620 per DigiKey listing) |
| Embedded SRAM | — | 504 kbits true dual-port |
| Core Voltage | — | 1.2 V to 1.5 V |
| Volte ng Pagbibigay | — | 1.5 V |
| Logic Family | — | CMOS |
| Uri ng Pagpapasok | — | Surface Mount |
| Configuration | — | Non-volatile flash, live-at-power-up Level 0, single-chip |
| Low-Power Feature | — | Flash*Freeze technology |
| Boundary Scan | — | IEEE 1149.1 (JTAG) |
| Input Features | — | Schmitt trigger option on single-ended inputs; weak pull-up/pull-down |