CDK2308CILP64 vs CDK2308DILP64 तुलना
विस्तृत दोनों ओर की तुलना CDK2308CILP64 द्वारा MaxLinear और CDK2308DILP64 द्वारा MaxLinear. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | CDK2308CILP64 | CDK2308DILP64 |
|---|---|---|
| ब्रांड | MaxLinear | MaxLinear |
| श्रेणी | ADC/DAC | ADC/DAC |
| लाइफसाइकिल स्थिति | सक्रिय | सक्रिय |
| रेज़ोल्यूशन | 10 bit | 10 bit |
| Number of Channels | 2 (dual) | 2 (Dual) |
| Sample Rate (max) | 65 MSPS per channel | — |
| Architecture | Pipelined | Pipelined ADC |
| Input Type | Differential, single-ended capable | Single-ended analog |
| Analog Supply Voltage | 3.3 V | — |
| Digital Output Supply | 1.8 V to 3.3 V | — |
| Digital Output Interface | Parallel CMOS | — |
| Data Rate (per channel) | Up to 65 MSPS | — |
| Reference | Internal bandgap; external reference supported | — |
| Sample-Rate Family | 20 / 40 / 65 / 80 MSPS (per datasheet family) | — |
| पैकेज | 64-pin QFN with Exposed Pad (EP) | 64-QFN (9x9 mm) |
| माउंटिंग प्रकार | Surface Mount | Surface Mount |
| ऑपरेटिंग तापमान | -40 C to +85 C (industrial) | — |
| RoHS स्थिति | Compliant | Compliant |
| Sampling Rate (max) | — | 80 MSPS |
| Supported Sample Rates | — | 20 / 40 / 65 / 80 MSPS (programmable) |
| Power Dissipation | — | 78 mW per channel at 80 MSPS |
| Supply Voltage (AVDD) | — | [DATA_NEEDED: AVDD nominal voltage] |
| Supply Voltage (DRVDD) | — | [DATA_NEEDED: DRVDD nominal voltage] |
| Input Bandwidth | — | [DATA_NEEDED: -3 dB input bandwidth] |
| SNR | — | [DATA_NEEDED: SNR at full scale] |
| SFDR | — | [DATA_NEEDED: SFDR] |
| ENOB | — | [DATA_NEEDED: effective number of bits] |
| ऑपरेटिंग तापमान रेंज | — | -40 C to +85 C |
| MSL स्तर | — | [DATA_NEEDED: MSL rating] |
| Power-Down Modes | — | Per-channel standby, chip standby, full power-down |
| Track-and-Hold Amplifier | — | Integrated, optimized for IF frequencies |