CDK2308CILP64 vs CDK2308DILP64 Perbandingan
Perbandingan bersamaan detil CDK2308CILP64 dari MaxLinear dan CDK2308DILP64 dari MaxLinear. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | CDK2308CILP64 | CDK2308DILP64 |
|---|---|---|
| Merek | MaxLinear | MaxLinear |
| Kategori | ADC/DAC | ADC/DAC |
| Status Lingkungan Hidup | Aktif | Aktif |
| Resolusi | 10 bit | 10 bit |
| Number of Channels | 2 (dual) | 2 (Dual) |
| Sample Rate (max) | 65 MSPS per channel | — |
| Architecture | Pipelined | Pipelined ADC |
| Input Type | Differential, single-ended capable | Single-ended analog |
| Analog Supply Voltage | 3.3 V | — |
| Digital Output Supply | 1.8 V to 3.3 V | — |
| Digital Output Interface | Parallel CMOS | — |
| Data Rate (per channel) | Up to 65 MSPS | — |
| Reference | Internal bandgap; external reference supported | — |
| Sample-Rate Family | 20 / 40 / 65 / 80 MSPS (per datasheet family) | — |
| Paket | 64-pin QFN with Exposed Pad (EP) | 64-QFN (9x9 mm) |
| Tipe Mounting | Surface Mount | Surface Mount |
| Suhu Kerja | -40 C to +85 C (industrial) | — |
| Status RoHS | Compliant | Compliant |
| Sampling Rate (max) | — | 80 MSPS |
| Supported Sample Rates | — | 20 / 40 / 65 / 80 MSPS (programmable) |
| Power Dissipation | — | 78 mW per channel at 80 MSPS |
| Supply Voltage (AVDD) | — | [DATA_NEEDED: AVDD nominal voltage] |
| Supply Voltage (DRVDD) | — | [DATA_NEEDED: DRVDD nominal voltage] |
| Input Bandwidth | — | [DATA_NEEDED: -3 dB input bandwidth] |
| SNR | — | [DATA_NEEDED: SNR at full scale] |
| SFDR | — | [DATA_NEEDED: SFDR] |
| ENOB | — | [DATA_NEEDED: effective number of bits] |
| Rentang Suhu Kerja | — | -40 C to +85 C |
| Level MSL | — | [DATA_NEEDED: MSL rating] |
| Power-Down Modes | — | Per-channel standby, chip standby, full power-down |
| Track-and-Hold Amplifier | — | Integrated, optimized for IF frequencies |