CDK2308CILP64 vs CDK2308DILP64 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci CDK2308CILP64 disebabkan oleh MaxLinear dan CDK2308DILP64 disebabkan oleh MaxLinear. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr CDK2308CILP64 CDK2308DILP64
Merek MaxLinear MaxLinear
Kategori ADC/DAC ADC/DAC
Status Lingkungan Hidup Aktif Aktif
Pemecahkatan 10 bit 10 bit
Number of Channels 2 (dual) 2 (Dual)
Sample Rate (max) 65 MSPS per channel —
Architecture Pipelined Pipelined ADC
Input Type Differential, single-ended capable Single-ended analog
Analog Supply Voltage 3.3 V —
Digital Output Supply 1.8 V to 3.3 V —
Digital Output Interface Parallel CMOS —
Data Rate (per channel) Up to 65 MSPS —
Reference Internal bandgap; external reference supported —
Sample-Rate Family 20 / 40 / 65 / 80 MSPS (per datasheet family) —
Kemasan 64-pin QFN with Exposed Pad (EP) 64-QFN (9x9 mm)
Jenis Pemasangan Surface Mount Surface Mount
Suhu Operasi -40 C to +85 C (industrial) —
Status RoHS Compliant Compliant
Sampling Rate (max) — 80 MSPS
Supported Sample Rates — 20 / 40 / 65 / 80 MSPS (programmable)
Power Dissipation — 78 mW per channel at 80 MSPS
Supply Voltage (AVDD) — [DATA_NEEDED: AVDD nominal voltage]
Supply Voltage (DRVDD) — [DATA_NEEDED: DRVDD nominal voltage]
Input Bandwidth — [DATA_NEEDED: -3 dB input bandwidth]
SNR — [DATA_NEEDED: SNR at full scale]
SFDR — [DATA_NEEDED: SFDR]
ENOB — [DATA_NEEDED: effective number of bits]
Gambaran Suhu Operasi — -40 C to +85 C
Aras MSL — [DATA_NEEDED: MSL rating]
Power-Down Modes — Per-channel standby, chip standby, full power-down
Track-and-Hold Amplifier — Integrated, optimized for IF frequencies

Laporan Datasheet & Sumber

Lihat Semua Produk Buat BOQ Minta Bao Harga