EP20K400BI652-2V vs EP20K400CB652C9ES तुलना
विस्तृत दोनों ओर की तुलना EP20K400BI652-2V द्वारा Intel और EP20K400CB652C9ES द्वारा Intel. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Intel
EP20K400BI652-2V - 400K Gates APEX 20K FPGA 652-BGA | Intel / Altera
EP20K400BI652-2V Obsoleteविशेषता तुलना
| पैरामीटर | EP20K400BI652-2V | EP20K400CB652C9ES |
|---|---|---|
| ब्रांड | Intel | Intel |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | Obsolete | NRND |
| Family | APEX 20K | APEX 20KC |
| Series | APEX 20K (EPLD-based SOPC) | APEX 20KC |
| System Gates | 400,000 | — |
| Logic Elements | 16,640 | — |
| Maximum User I/O | 502 | — |
| Embedded Memory (bits) | 212,992 | — |
| Embedded Memory Blocks | ESBs (Embedded System Blocks) | — |
| Macros (per Mouser listing) | 1664 | — |
| Logic Family | CMOS | — |
| Process Technology | 0.22 μm | 0.15 µm CMOS |
| Core Supply Voltage (VCCINT) | 2.5 V | — |
| Propagation Delay | 2.5 ns (typical) | — |
| Internal Performance | 200 MHz (speed grade -2) | — |
| ऑपरेटिंग तापमान | 0 °C to +85 °C (industrial, "I") | — |
| पैकेज | 652-ball FineLine BGA (35 × 35 mm, 1.27 mm pitch) | — |
| माउंटिंग प्रकार | Surface Mount (BGA) | Surface Mount |
| RoHS स्थिति | [DATA_NEEDED: rohs_status] | [DATA_NEEDED: RoHS status] |
| Configuration Interface | JTAG (IEEE 1149.1) / Passive Serial | — |
| Logic Elements / Cells | — | 16640 |
| Total System Gates | — | 400000 |
| Embedded Memory (Bits) | — | 212992 |
| Number of User I/O | — | 488 |
| Number of LABs/CLBs | — | [DATA_NEEDED: LAB count] |
| Number of Logic Array Blocks | — | 1040 |
| Maximum Operating Frequency | — | 250 MHz |
| Core Voltage | — | 1.8 V |
| ऑपरेटिंग तापमान रेंज | — | 0°C to +85°C (Commercial) |
| पैकेज / केस | — | 652-BGA |
| MSL स्तर | — | 3 (168 Hours) |
| Packaging | — | Tray |
| Programmability Type | — | In-system programmable (SRAM-based) |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, LVDS, HSTL, SSTL |
| JTAG (IEEE 1149.1) | — | Yes |
| PLL | — | Yes (4-phase) |