EP20K400CB652C9N vs EP20K400CB652C9ES तुलना
विस्तृत दोनों ओर की तुलना EP20K400CB652C9N द्वारा Intel और EP20K400CB652C9ES द्वारा Intel. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | EP20K400CB652C9N | EP20K400CB652C9ES |
|---|---|---|
| ब्रांड | Intel | Intel |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | NRND | NRND |
| Family | APEX 20KC | APEX 20KC |
| Series | EP20K400 | APEX 20KC |
| Device Type | Programmable Logic Device (SOPC FPGA) | — |
| Architecture | MultiCore (LUT logic + Embedded System Blocks) | — |
| System Gates | 400,000 | — |
| Logic Elements | 16,640 | — |
| Maximum User I/Os | 502 | — |
| Total Memory Bits | 212,992 (per chip) | — |
| Maximum Internal Frequency | 250 MHz | — |
| Propagation Delay | 2.0 ns | — |
| Logic Family | CMOS | — |
| Core Process Technology | 0.15 µm all-layer copper CMOS | — |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Supply Voltage (VCCIO) | 2.5 V | — |
| ऑपरेटिंग तापमान रेंज | 0 °C to +85 °C (Commercial) | 0°C to +85°C (Commercial) |
| पैकेज | BGA-652 (Plastic Ball Grid Array, 652 balls) | — |
| माउंटिंग प्रकार | Surface Mount | Surface Mount |
| Configuration Interface | IEEE 1149.1 JTAG, serial passive parallel async | — |
| RoHS स्थिति | Unknown (legacy Altera part - verify with distributor) | [DATA_NEEDED: RoHS status] |
| Logic Elements / Cells | — | 16640 |
| Total System Gates | — | 400000 |
| Embedded Memory (Bits) | — | 212992 |
| Number of User I/O | — | 488 |
| Number of LABs/CLBs | — | [DATA_NEEDED: LAB count] |
| Number of Logic Array Blocks | — | 1040 |
| Maximum Operating Frequency | — | 250 MHz |
| Core Voltage | — | 1.8 V |
| Process Technology | — | 0.15 µm CMOS |
| पैकेज / केस | — | 652-BGA |
| MSL स्तर | — | 3 (168 Hours) |
| Packaging | — | Tray |
| Programmability Type | — | In-system programmable (SRAM-based) |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, LVDS, HSTL, SSTL |
| JTAG (IEEE 1149.1) | — | Yes |
| PLL | — | Yes (4-phase) |