EP20K400CB652C9N vs EP20K400CB652C9ES 比較
詳細並排比較 EP20K400CB652C9N 由 Intel 與 EP20K400CB652C9ES 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K400CB652C9N | EP20K400CB652C9ES |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | NRND |
| Family | APEX 20KC | APEX 20KC |
| Series | EP20K400 | APEX 20KC |
| Device Type | Programmable Logic Device (SOPC FPGA) | — |
| Architecture | MultiCore (LUT logic + Embedded System Blocks) | — |
| System Gates | 400,000 | — |
| Logic Elements | 16,640 | — |
| Maximum User I/Os | 502 | — |
| Total Memory Bits | 212,992 (per chip) | — |
| Maximum Internal Frequency | 250 MHz | — |
| Propagation Delay | 2.0 ns | — |
| Logic Family | CMOS | — |
| Core Process Technology | 0.15 µm all-layer copper CMOS | — |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Supply Voltage (VCCIO) | 2.5 V | — |
| 工作溫度範圍 | 0 °C to +85 °C (Commercial) | 0°C to +85°C (Commercial) |
| 封裝 | BGA-652 (Plastic Ball Grid Array, 652 balls) | — |
| 安裝類型 | Surface Mount | Surface Mount |
| Configuration Interface | IEEE 1149.1 JTAG, serial passive parallel async | — |
| RoHS 狀態 | Unknown (legacy Altera part - verify with distributor) | [DATA_NEEDED: RoHS status] |
| Logic Elements / Cells | — | 16640 |
| Total System Gates | — | 400000 |
| Embedded Memory (Bits) | — | 212992 |
| Number of User I/O | — | 488 |
| Number of LABs/CLBs | — | [DATA_NEEDED: LAB count] |
| Number of Logic Array Blocks | — | 1040 |
| Maximum Operating Frequency | — | 250 MHz |
| Core Voltage | — | 1.8 V |
| Process Technology | — | 0.15 µm CMOS |
| 封裝 / 外殼 | — | 652-BGA |
| MSL 等級 | — | 3 (168 Hours) |
| Packaging | — | Tray |
| Programmability Type | — | In-system programmable (SRAM-based) |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, LVDS, HSTL, SSTL |
| JTAG (IEEE 1149.1) | — | Yes |
| PLL | — | Yes (4-phase) |