EP910PC-15 vs EP610PC-15 तुलना
विस्तृत दोनों ओर की तुलना EP910PC-15 द्वारा Altera और EP610PC-15 द्वारा Altera. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | EP910PC-15 | EP610PC-15 |
|---|---|---|
| ब्रांड | Altera | Altera |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | Obsolete | NRND |
| Family | Altera Classic EPLD | Classic EPLD |
| Usable Gates | 900 | 300 gates |
| Macrocells | 24 | 16 |
| Maximum Pin-to-Pin Delay (tpd) | 15 ns | — |
| Counter Frequency (fCNT) | 100 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | 5 V (single supply) |
| Supply Current (Icc) | 80 mA typical | — |
| Dedicated Inputs | 10 | — |
| Dedicated I/O Pins | 12 | — |
| ऑपरेटिंग तापमान | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature range] |
| पैकेज | 24-pin PDIP (PDIP-24, 0.300 inch) | PDIP-24 (plastic DIP, 24-pin) |
| माउंटिंग प्रकार | Through-Hole | Through-Hole (DIP) |
| Process Technology | CMOS, UV-erasable | — |
| Programming Method | Altera Logic Programmer card | — |
| RoHS स्थिति | [DATA_NEEDED: RoHS status - EP910 is a legacy through-hole part, likely non-RoHS] | [DATA_NEEDED: RoHS status] |
| MSL स्तर | Not applicable (through-hole) | — |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Logic Delay (tPD) | — | 15 ns (pin-to-pin, -15 speed grade) |
| Maximum Counter Frequency | — | 100 MHz (per family datasheet) |
| Pipelined Data Rate | — | Up to 100 MHz |
| Technology | — | CMOS |
| Architecture | — | PAL-type, sum-of-products AND/OR array |
| TTL Emulation | — | 100% TTL compatible |
| पिन काउंट | — | 24 pins |
| Development Tool | — | Altera MAX+PLUS II |
| Logic Test Circuitry | — | On-board for AC/DC verification |