EP910PC-15 vs EP610PC-15 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910PC-15 sa pamamagitan ng Altera at EP610PC-15 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP910PC-15 | EP610PC-15 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | Altera Classic EPLD | Classic EPLD |
| Usable Gates | 900 | 300 gates |
| Macrocells | 24 | 16 |
| Maximum Pin-to-Pin Delay (tpd) | 15 ns | — |
| Counter Frequency (fCNT) | 100 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | 5 V (single supply) |
| Supply Current (Icc) | 80 mA typical | — |
| Dedicated Inputs | 10 | — |
| Dedicated I/O Pins | 12 | — |
| Temperature na Operasyon | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature range] |
| Packhaging | 24-pin PDIP (PDIP-24, 0.300 inch) | PDIP-24 (plastic DIP, 24-pin) |
| Uri ng Pagpapasok | Through-Hole | Through-Hole (DIP) |
| Process Technology | CMOS, UV-erasable | — |
| Programming Method | Altera Logic Programmer card | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status - EP910 is a legacy through-hole part, likely non-RoHS] | [DATA_NEEDED: RoHS status] |
| Level ng MSL | Not applicable (through-hole) | — |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Logic Delay (tPD) | — | 15 ns (pin-to-pin, -15 speed grade) |
| Maximum Counter Frequency | — | 100 MHz (per family datasheet) |
| Pipelined Data Rate | — | Up to 100 MHz |
| Technology | — | CMOS |
| Architecture | — | PAL-type, sum-of-products AND/OR array |
| TTL Emulation | — | 100% TTL compatible |
| Bilang ng Pin | — | 24 pins |
| Development Tool | — | Altera MAX+PLUS II |
| Logic Test Circuitry | — | On-board for AC/DC verification |