EPM5128JC-1 vs EPM5128LC-1 तुलना
विस्तृत दोनों ओर की तुलना EPM5128JC-1 द्वारा Altera और EPM5128LC-1 द्वारा Altera. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | EPM5128JC-1 | EPM5128LC-1 |
|---|---|---|
| ब्रांड | Altera | Altera |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | Erasable Programmable Logic Device (EPLD/CPLD) | — |
| Macrocells | 128 | — |
| Usable Gates | 2,500 | — |
| Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | — |
| Maximum Operating Frequency | 62.5 MHz | — |
| Pin-to-Pin Propagation Delay (tPD) | 40 ns | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | 5 V (±10%) |
| Technology | CMOS, UV-erasable EPROM | — |
| पैकेज | 68-pin CQCCJ (Windowed Ceramic J-Lead Chip Carrier) | — |
| माउंटिंग प्रकार | Surface Mount | Surface Mount (J-lead PLCC socket compatible) |
| ऑपरेटिंग तापमान | [DATA_NEEDED: temperature grade] | 0C to +70C (commercial) |
| Programming Interface | JTAG / Altera dedicated programmer | — |
| Configuration Memory | Non-volatile EPROM (UV-erasable) | — |
| RoHS स्थिति | non_compliant (ceramic windowed package) | [DATA_NEEDED: RoHS status] |
| लाइफसाइकिल स्थिति | Obsolete - last-time-buy inventory only | — |
| Logic Elements / Macrocells | — | 128 macrocells |
| Number of Usable Gates | — | [DATA_NEEDED: usable gates] |
| Dedicated Inputs | — | 7 |
| Bidirectional I/O Pins | — | 52 |
| Total User I/O | — | 60 (max) |
| Propagation Delay (tpd) | — | 30 ns |
| Process Technology | — | CMOS EPROM, UV-erasable |
| Programmability | — | UV-erasable / OTP (windowed package) |
| Package Type | — | 68-pin J-lead ceramic chip carrier (PLCC windowed) |
| JTAG Support | — | IEEE 1149.1 boundary-scan |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |