RTAX2000S-1CGS624EV vs RTAX2000SL-CGS624V तुलना
विस्तृत दोनों ओर की तुलना RTAX2000S-1CGS624EV द्वारा Microchip Technology और RTAX2000SL-CGS624V द्वारा Microchip Technology. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Microchip Technology
RTAX2000S-1CGS624EV - 2M-Gate Rad-Tolerant FPGA | Microchip
RTAX2000S-1CGS624EV ✓ सक्रियMicrochip Technology
RTAX2000SL-CGS624V - 2M-Gate Rad-Tolerant FPGA | Microchip
RTAX2000SL-CGS624V ✓ सक्रियविशेषता तुलना
| पैरामीटर | RTAX2000S-1CGS624EV | RTAX2000SL-CGS624V |
|---|---|---|
| ब्रांड | Microchip Technology | Microchip Technology |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | सक्रिय | सक्रिय |
| System Gates | 2,000,000 | — |
| Logic Cells (CLBs) | 21504 | 21504 |
| Total Cells | 32256 | — |
| Additional ASIC Equivalent Gates | 250000 | — |
| पैकेज | 624-pin Ceramic Column Grid Array (CGA-624 / CCGA624) | CG624 ceramic package |
| Core Supply Voltage | 1.5 V nominal (1.425 V to 1.575 V) | [DATA_NEEDED: core supply voltage] |
| ऑपरेटिंग तापमान | -55C to +125C | [DATA_NEEDED: operating temperature range] |
| Process Technology | 0.15 um CMOS | — |
| Maximum Frequency | 649 MHz | — |
| Logic Family | CMOS | — |
| SEU Immunity | SEU-hardened registers, immune to single-event upsets to specified LET threshold | — |
| SEU Rate | < 10-10 errors/bit-day | — |
| Configuration | One-time programmable anti-fuse, live at power-up, single chip | One-time programmable antifuse, live at power-up |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | 540 kbits with optional EDAC protection |
| माउंटिंग प्रकार | Surface Mount | — |
| Product Family | RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs | — |
| Thermal Resistance Basis | JEDEC JESD51 simulation conditions (per datasheet) | — |
| I/O Supply Voltage | [DATA_NEEDED: I/O bank voltage] | [DATA_NEEDED: I/O supply voltage] |
| Maximum User I/O | [DATA_NEEDED: user I/O count] | — |
| RoHS स्थिति | [DATA_NEEDED: RoHS status] | — |
| Equivalent System Gates | — | 2000000 |
| Technology | — | CMOS antifuse (nonvolatile) |
| User I/Os (maximum) | — | 684 |
| Total Ionizing Dose (TID) | — | 300 krad (Si) functional / 200 krad (Si) parametric |
| Single-Event Upset Rate | — | Less than 1E-10 errors per bit-day |
| Embedded SRAM Features | — | Built-in FIFO control logic |
| Clock Architecture | — | Segmentable clock structures |
| Routing | — | Chip-wide highway routing, carry logic |
| Family | — | RTAX-S/SL Radiation-Tolerant FPGA |
| Application Domain | — | Space-flight systems |
| Speed Grade | — | [DATA_NEEDED: speed grade] |
| System Frequency (typical) | — | [DATA_NEEDED: system frequency] |