RTAX2000S-1CGS624EV vs RTAX2000SL-CGS624V موازنہ
تفصیلی ساتھ ساتھ موازنہ از RTAX2000S-1CGS624EV بذریعہ Microchip Technology اور RTAX2000SL-CGS624V بذریعہ Microchip Technology. اہم خصوصیات، برقی پیرامیٹرز، پیکیجنگ، لائف سائیکل اسٹیٹس، قیمتوں اور دستیابی کا موازنہ کریں تاکہ آپ کی ڈیزائن ضروریات کے لیے بہترین کمپوننٹ کا تعین ہو سکے۔
Microchip Technology
RTAX2000S-1CGS624EV - 2M-Gate Rad-Tolerant FPGA | Microchip
RTAX2000S-1CGS624EV ✓ فعالMicrochip Technology
RTAX2000SL-CGS624V - 2M-Gate Rad-Tolerant FPGA | Microchip
RTAX2000SL-CGS624V ✓ فعالخصوصیات کا موازنہ
| پیرامیٹر | RTAX2000S-1CGS624EV | RTAX2000SL-CGS624V |
|---|---|---|
| برانڈ | Microchip Technology | Microchip Technology |
| زمرہ | FPGA & CPLD | FPGA & CPLD |
| لائف سائیکل کی حالت | فعال | فعال |
| System Gates | 2,000,000 | — |
| Logic Cells (CLBs) | 21504 | 21504 |
| Total Cells | 32256 | — |
| Additional ASIC Equivalent Gates | 250000 | — |
| پیکیج | 624-pin Ceramic Column Grid Array (CGA-624 / CCGA624) | CG624 ceramic package |
| Core Supply Voltage | 1.5 V nominal (1.425 V to 1.575 V) | [DATA_NEEDED: core supply voltage] |
| آپریٹنگ درجہ حرارت | -55C to +125C | [DATA_NEEDED: operating temperature range] |
| Process Technology | 0.15 um CMOS | — |
| Maximum Frequency | 649 MHz | — |
| Logic Family | CMOS | — |
| SEU Immunity | SEU-hardened registers, immune to single-event upsets to specified LET threshold | — |
| SEU Rate | < 10-10 errors/bit-day | — |
| Configuration | One-time programmable anti-fuse, live at power-up, single chip | One-time programmable antifuse, live at power-up |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | 540 kbits with optional EDAC protection |
| ماؤنٹنگ ٹائپ | Surface Mount | — |
| Product Family | RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs | — |
| Thermal Resistance Basis | JEDEC JESD51 simulation conditions (per datasheet) | — |
| I/O Supply Voltage | [DATA_NEEDED: I/O bank voltage] | [DATA_NEEDED: I/O supply voltage] |
| Maximum User I/O | [DATA_NEEDED: user I/O count] | — |
| RoHS اسٹیٹس | [DATA_NEEDED: RoHS status] | — |
| Equivalent System Gates | — | 2000000 |
| Technology | — | CMOS antifuse (nonvolatile) |
| User I/Os (maximum) | — | 684 |
| Total Ionizing Dose (TID) | — | 300 krad (Si) functional / 200 krad (Si) parametric |
| Single-Event Upset Rate | — | Less than 1E-10 errors per bit-day |
| Embedded SRAM Features | — | Built-in FIFO control logic |
| Clock Architecture | — | Segmentable clock structures |
| Routing | — | Chip-wide highway routing, carry logic |
| Family | — | RTAX-S/SL Radiation-Tolerant FPGA |
| Application Domain | — | Space-flight systems |
| Speed Grade | — | [DATA_NEEDED: speed grade] |
| System Frequency (typical) | — | [DATA_NEEDED: system frequency] |