CDK1307CILP40 vs CDK1308AILP40 Perbandingan
Perbandingan bersamaan detil CDK1307CILP40 dari MaxLinear dan CDK1308AILP40 dari MaxLinear. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | CDK1307CILP40 | CDK1308AILP40 |
|---|---|---|
| Merek | MaxLinear | MaxLinear |
| Kategori | ADC/DAC | ADC/DAC |
| Status Lingkungan Hidup | Aktif | Aktif |
| Part Number | CDK1307CILP40 | — |
| Manufacturer | MaxLinear (formerly Exar/Cadeka) | MaxLinear (formerly Exar Corporation) |
| Fungsi | Analog-to-Digital Converter (ADC) | — |
| Resolusi | 12-bit / 13-bit selectable | 10 bit |
| Sample Rate | 65 MSPS (family supports 20/40/65/80 MSPS) | — |
| Architecture | Multi-stage pipeline with digital error correction | Proprietary, digital error correction |
| Input Type | Single-ended analog input | — |
| Full-Scale Input Range | 1 Vpp typical | — |
| Supply Voltage (Analog) | 3.3 V | — |
| Supply Voltage (Digital) | 3.3 V | — |
| Reference | Internal (1.2 V bandgap) | Internal (no external reference required) |
| Output Interface | Parallel CMOS | — |
| Control Interface | CMOS serial configuration | CMOS |
| Paket | 40-pin LQFP (LP) | 40-pin QFN |
| Suhu Kerja | -40 C to +85 C (industrial) | — |
| Status RoHS | Compliant | Compliant (per distributor listings) |
| Maximum Sample Rate | — | 20 MSPS |
| Family Sample Rate Options | — | 20 / 40 / 65 / 80 MSPS |
| Digital Interface | — | CMOS, parallel |
| Power-Down Pin (PD_N) | — | Yes (active low) |
| Sleep Pin (SLP_N) | — | Yes (active low) |
| Tipe Mounting | — | Surface Mount |
| Power Consumption | — | Ultra-low (per family datasheet, exact value [DATA_NEEDED: power consumption mW]) |
| Rentang Suhu Kerja | — | [DATA_NEEDED: operating temperature range] |
| Tegangan Pemuat | — | [DATA_NEEDED: AVDD / DRVDD values] |