EP20K600CB652C7E5 vs EP20K600CB652C7ES Perbandingan

Perbandingan bersamaan detil EP20K600CB652C7E5 dari Intel dan EP20K600CB652C7ES dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EP20K600CB652C7E5 EP20K600CB652C7ES
Merek Intel Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family APEX 20KC APEX 20KC
Typical Gate Count 600K gates —
Logic Elements / Macros 24,320 —
Maximum User I/O 488 488
Embedded Memory (EAB bits) 311,296 bits —
Paket 652-ball FineLine BGA —
Core Voltage 1.8 V —
Process Technology 0.15 um CMOS 0.15 µm CMOS
Suhu Kerja 0C to +85C (commercial, suffix C7) 0 °C to +85 °C (commercial)
Speed Grade 7 (-1 speed bin equivalent, E5 suffix) —
PLL Count 4 —
Supported I/O Standards LVTTL, LVCMOS, PCI, SSTL, HSTL —
Configuration Scheme Passive Serial / JTAG / EPC16 / EPC8 —
Status RoHS [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status]
Status Lingkungan Hidup Obsolete - last time buy has passed —
Logic Elements — 24,320
System Gates — 600,000
Maximum System Gates — 1,053,840
Embedded Memory Bits — 311,296
Embedded System Blocks (ESB) — 26
User I/O (this package) — 488 (652-BGA)
Supply Voltage - Core — 1.71 V to 1.89 V (1.8 V nominal)
Maximum Internal Clock Frequency — 1666.6 MHz
Propagation Delay — 1.6 ns
Package Type — 652-ball FineLine BGA
JEDEC Package Code — S-PBGA-B652
Configuration Modes — Passive Serial, Passive Parallel, JTAG
JTAG Boundary Scan — IEEE 1149.1 compliant
PLLs — 4
Tipe Mounting — Surface Mount (BGA)

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