EP20K600CF672I8 vs EP20K600CF672C8N Perbandingan
Perbandingan bersamaan detil EP20K600CF672I8 dari Altera dan EP20K600CF672C8N dari Intel. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | EP20K600CF672I8 | EP20K600CF672C8N |
|---|---|---|
| Merek | Altera | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Aktif |
| Family | APEX 20KC | APEX 20KC |
| Device Type | SPLD / FPGA | SPLD |
| Logic Elements / Cells | 24,320 | — |
| Macros (Logic Cells) | 2432 | — |
| Typical Gate Count | 600,000 gates | — |
| Embedded Memory | 311,296 bits | — |
| User I/Os | 488 to 508 | — |
| Jumlah Pin | 652 (functional) / 672 (BGA balls) | — |
| Propagation Delay (typical) | 1.48 ns | — |
| Internal Frequency (max) | [DATA_NEEDED: max internal frequency in MHz] | — |
| Core Supply Voltage | 1.8 V | — |
| Process Technology | 0.15 µm all-layer copper | — |
| Suhu Kerja | 0 °C to +85 °C (Industrial) | 0°C to 85°C |
| Package Type | 672-ball BGA, 45 x 45 mm, 1.27 mm pitch | — |
| Tipe Mounting | Surface Mount | Surface mount |
| Status RoHS | Compliant per legacy product records | unknown |
| Configuration Interface | JTAG / Passive Serial | — |
| Design Tool | Quartus II (legacy MAX+PLUS II) | — |
| Product Type | — | FPGA / programmable logic device |
| Nominal Gate Capacity | — | 600K gates |
| Logic Elements or Cells | — | 24,320 |
| Macros | — | 2,432 |
| User I/O Count | — | 508 |
| Package Terminals | — | 652 pins |
| Paket | — | BGA-652, 45 x 45 mm, 1.27 mm pitch |
| Package Description | — | 672-pin FC-FBGA |
| Tegangan Pemuat | — | 1.8 V |
| Listed Frequency | — | 301.21 MHz |
| Propagation Delay | — | 1.48 ns |
| Fabrication Process | — | 0.15 µm |
| Interconnect Metal | — | All-layer copper metal |
| I/O Configuration | — | 508 user I/O |
| REACH Status | — | unknown |
| AEC-Q100 Qualification | — | unknown |
| Configuration Method | — | [DATA_NEEDED: configuration memory and programming method] |
| Core Current | — | [DATA_NEEDED: core supply current] |
| I/O Bank Voltage | — | [DATA_NEEDED: supported I/O voltage range] |
| Junction Temperature | — | [DATA_NEEDED: maximum junction temperature] |
| Tahanan Panas | — | [DATA_NEEDED: junction-to-ambient thermal resistance] |