EP2A25F672C9 vs EP2A25F672I6 Perbandingan

Perbandingan bersamaan detil EP2A25F672C9 dari Altera dan EP2A25F672I6 dari Intel. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EP2A25F672C9 EP2A25F672I6
Merek Altera Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup NRND NRND
Family APEX II APEX II
Logic Elements (LE) Approximately 25,000 —
Macro Cells 2432 —
User I/O 492 —
Paket 672-ball FCBGA (FineLine BGA) 672-ball FineLine BGA (FBGA-672)
Package Dimensions 27 mm x 27 mm —
Ball Pitch 1.0 mm —
Process Technology 0.15 µm all-layer copper, up to 8 metal layers 0.18 µm CMOS
Logic Family CMOS —
Propagation Delay 1.69 ns —
Suhu Kerja 0°C to 85°C (Commercial) —
Tegangan Pemuat [DATA_NEEDED: core VCC voltage] —
I/O Standards LVTTL, LVCMOS, PCI, LVDS, HSTL, SSTL (multi-voltage 1.5/1.8/2.5/3.3 V) —
Configuration Passive Serial, Passive Parallel Synchronous, JTAG —
Embedded Memory ESBs for dual-port RAM, ROM, FIFO Embedded System Blocks (ESB), dual-port RAM / CAM
Tipe Mounting Surface Mount Surface Mount (BGA)
Status RoHS [DATA_NEEDED] [DATA_NEEDED: RoHS compliance status]
Logic Elements (typical gates) — 25,000
Fabric Architecture — SRAM-based LUT
Core Voltage — 1.5 V
Configuration Method — External SRAM configuration device (EPC series)
Temperature Grade — Industrial (-40 °C to +100 °C ambient)
Speed Grade — 6
DSP Blocks — MultiCore dedicated multipliers
Boundary Scan — JTAG (IEEE 1149.1) compliant
Clock Management — Dedicated PLL / clock tree circuitry
I/O Bank Count — [DATA_NEEDED: number of user I/O banks]
Lead-Free — [DATA_NEEDED: lead-free status]
Level MSL — [DATA_NEEDED: moisture sensitivity level]

Spek dan Sumber

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