EPM2210F256C4N vs EPM2210F256C3N Perbandingan
Perbandingan bersamaan detil EPM2210F256C4N dari Intel dan EPM2210F256C3N dari Intel. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | EPM2210F256C4N | EPM2210F256C3N |
|---|---|---|
| Merek | Intel | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Aktif | Aktif |
| Family | MAX II | — |
| Device Type | CPLD | CPLD (Complex Programmable Logic Device) |
| Logic Elements (LE) | 2210 | — |
| Macro Cells | 1700 | — |
| User Flash Memory | 204 Kbit | 8 Kbits |
| Maximum Internal Frequency | 247.5 MHz | — |
| Pin-to-Pin Propagation Delay (tPD) | 7.0 ns | — |
| Maximum User I/O Pins | 212 (varies with package) | — |
| Global Clock Networks | 4 | — |
| Process Technology | 0.18 µm | 0.18 um flash CMOS |
| Core Supply Voltage | 3.0 V to 3.6 V (3.3 V typical) | — |
| MultiVolt I/O Standards | 1.5 V / 1.8 V / 2.5 V / 3.3 V LVTTL/LVCMOS, PCI 66 MHz | — |
| Rentang Suhu Kerja | 0 °C to +85 °C (Commercial) | — |
| Paket | 256-ball FineLine BGA (FBGA) | 256-ball FineLine BGA (FBGA), 17 x 17 mm, 1.0 mm pitch |
| Programming Interface | JTAG IEEE Std. 1149.1 + ISP | — |
| Tipe Mounting | Surface Mount (BGA) | Surface Mount |
| Status RoHS | Compliant | Compliant (per DigiKey product page) |
| Lead-Free | Yes | — |
| Series | — | MAX II |
| Programmable Type | — | In System Programmable (JTAG, IEEE 1149.1) |
| Macrocells | — | 1700 |
| Logic Elements / Blocks | — | 2210 |
| Number of User I/Os | — | 204 |
| Maximum Propagation Delay (tPD) | — | 7 ns |
| Maximum Internal Frequency (fMAX) | — | 304 MHz |
| Internal Supply Voltage | — | 2.5 V / 3.3 V (on-chip regulator allows single 3.3 V rail) |
| I/O Standard Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V LVCMOS (MultiVolt) |
| Configuration Memory | — | On-chip flash (non-volatile, instant-on) |
| Suhu Hubung Kerja | — | 0 C to 85 C (commercial, TJ suffix 'C') |
| Level MSL | — | 3 (per JEDEC J-STD-020, typical for FBGA) |