EPM5032SC-20 vs EPM5032PC-15 Perbandingan

Perbandingan bersamaan detil EPM5032SC-20 dari Altera dan EPM5032PC-15 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EPM5032SC-20 EPM5032PC-15
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup NRND Obsolete
Device Type EPLD (Erasable Programmable Logic Device) EPLD (Erasable PLD)
Family MAX 5000 —
Macrocells 32 —
Dedicated Inputs 7 7
I/O Pins 16 —
Outputs 16 —
Propagation Delay (tPD) 20 ns 15 ns
Speed Grade -20 (20 ns) 15 (15 ns tPD)
Architecture PAL-type, CMOS, UV-erasable —
Interconnect Programmable Interconnect Array (PIA) —
Paket 20-pin SOIC (Small Outline) 28-pin PDIP (PC suffix = windowed CerDIP)
Suhu Kerja 0 °C to +70 °C (commercial grade) 0C to +70C (commercial)
Tipe Mounting Surface Mount Through-Hole (DIP)
Tegangan Pemuat [DATA_NEEDED: VCC typical range] —
Technology CMOS EPROM cell —
Programmability One-time programmable (windowless SOIC) —
Status RoHS [DATA_NEEDED: RoHS status not confirmed in verified data] Non-compliant (CerDIP window, contains Be)
Device Family — MAX 5000
Macro Cells — 32
Usable Gates — 600
Logic Elements / LABs — 1 LAB (4 macrocells per group)
Maximum Internal Frequency — 76.9 MHz (some sources list 83.3 MHz)
Operating Voltage (VCC) — 5 V (typ.)
Technology Node — 0.8 micron CMOS
Configuration Memory — UV-Erasable EPROM
Bidirectional I/O Pins — 16
Total Array Inputs — 24
Pin/Package Suffix — PC = Windowed Ceramic DIP
Programming Tool — Altera Logic Programmer + MAX+plus II
Lead-Free — No

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