EPM5128LC2 vs EPM5128GC2 Perbandingan
Perbandingan bersamaan detil EPM5128LC2 dari Altera dan EPM5128GC2 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | EPM5128LC2 | EPM5128GC2 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Waktu Pembelian Terakhir | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | CPLD (Complex Programmable Logic Device) | EPLD (Erasable Programmable Logic Device) |
| Macrocells | 128 | — |
| Logic Array Blocks (LABs) | 8 | 8 (16 macro cells each) |
| Interconnect | Programmable Interconnect Array (PIA) | — |
| Global Clock Inputs | 1 dedicated | — |
| Propagation Delay (tPD) | 45 ns | — |
| Supply Voltage (VCC) | 5 V | — |
| Process Technology | CMOS EPROM | CMOS EPROM |
| Configuration Memory | On-chip EPROM (non-volatile) | On-chip EPROM (no external boot device) |
| Boundary Scan | JTAG / IEEE 1149.1 | — |
| Suhu Kerja | -40 C to +85 C (extended commercial) | [DATA_NEEDED: operating temperature range] |
| Paket | PGA (Pin Grid Array, ceramic) | Ceramic PGA (GC, windowed) |
| Tipe Mounting | Through-Hole / Socketed | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Macro Cells | — | 128 |
| Usable Gates | — | 2.5K |
| Maximum Internal Frequency | — | 50 MHz |
| Supply Voltage VCC | — | 5 V |
| I/O Pins | — | 64 |
| Dedicated Inputs | — | 16 |
| Programmable Flip-Flop Modes | — | D / T / JK / SR (selectable) |
| Architecture | — | AND/OR plane + programmable macro cell + PIA |
| Reprogrammability | — | UV-erasable (windowed ceramic package) |
| Jumlah Pin | — | [DATA_NEEDED: total PGA pin count] |