EPM5128LC2 vs EPM5128GC2 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM5128LC2 disebabkan oleh Altera dan EPM5128GC2 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Altera
EPM5128LC2 EPM5128LC2 - 128-Macrocell MAX 5000 CPLD, 45ns, 5V | Altera

EPM5128LC2 - 128-Macrocell MAX 5000 CPLD, 45ns, 5V | Altera

EPM5128LC2 ⚠ Bahagian terakhir untuk beli

Pengandingan Spesifikasi

Parametr EPM5128LC2 EPM5128GC2
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Masa Terakhir Dibeli Obsolete
Family MAX 5000 MAX 5000
Device Type CPLD (Complex Programmable Logic Device) EPLD (Erasable Programmable Logic Device)
Macrocells 128 —
Logic Array Blocks (LABs) 8 8 (16 macro cells each)
Interconnect Programmable Interconnect Array (PIA) —
Global Clock Inputs 1 dedicated —
Propagation Delay (tPD) 45 ns —
Supply Voltage (VCC) 5 V —
Process Technology CMOS EPROM CMOS EPROM
Configuration Memory On-chip EPROM (non-volatile) On-chip EPROM (no external boot device)
Boundary Scan JTAG / IEEE 1149.1 —
Suhu Operasi -40 C to +85 C (extended commercial) [DATA_NEEDED: operating temperature range]
Kemasan PGA (Pin Grid Array, ceramic) Ceramic PGA (GC, windowed)
Jenis Pemasangan Through-Hole / Socketed —
Status RoHS [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Macro Cells — 128
Usable Gates — 2.5K
Maximum Internal Frequency — 50 MHz
Supply Voltage VCC — 5 V
I/O Pins — 64
Dedicated Inputs — 16
Programmable Flip-Flop Modes — D / T / JK / SR (selectable)
Architecture — AND/OR plane + programmable macro cell + PIA
Reprogrammability — UV-erasable (windowed ceramic package)
Kiraan Pin — [DATA_NEEDED: total PGA pin count]

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