EPM5192JC vs EPM5192JC68 Perbandingan
Perbandingan bersamaan detil EPM5192JC dari Intel dan EPM5192JC68 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | EPM5192JC | EPM5192JC68 |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | NRND |
| Product Type | CPLD (Complex Programmable Logic Device) | EPLD (Erasable Programmable Logic Device) |
| Series | EPM5192 (Classic / MAX-class) | — |
| Macrocells | 192 | — |
| Logic Array Blocks (LABs) | 12 | — |
| Interconnect Architecture | Programmable Interconnect Array (PIA) | — |
| Process Technology | CMOS EPROM (UV-erasable) | — |
| Paket | 68-pin PLCC (JC) windowed ceramic | — |
| Tipe Mounting | Surface Mount | Surface Mount (PLCC socket compatible) |
| Programming Method | UV-erase + EPROM programmer | — |
| Non-Volatile Configuration | Yes (EPROM cell array) | — |
| Logic Family | Classic CPLD (EPM5xxx series) | — |
| Suhu Kerja | [DATA_NEEDED: commercial / industrial / military grade] | 0C to 70C (commercial, JC suffix) |
| Tegangan Pemuat | [DATA_NEEDED: VCC nominal] | [DATA_NEEDED: VCC] |
| Propagation Delay | [DATA_NEEDED: tpd spec by speed grade] | — |
| Status RoHS | [DATA_NEEDED: original Altera marking not RoHS] | [DATA_NEEDED: RoHS compliance] |
| Device Family | — | MAX 5000 |
| Logic Elements / Macrocells | — | 192 macrocells |
| User I/O Pins | — | 76 |
| Jumlah Pin | — | 68 |
| Package Type | — | PLCC-68 (J-Lead) |
| Pin-to-Pin Delay (tPD) | — | [DATA_NEEDED: tPD] |
| Maximum Frequency (fMAX) | — | [DATA_NEEDED: fMAX] |
| Configuration Memory | — | UV-Erasable EPROM |
| Programmable Interconnect | — | Programmable Logic Array + Macrocells |
| Dedicated Inputs | — | 12 |
| Clock Pins | — | 4 dedicated |
| Programming Tool | — | MAX+PLUS II (legacy) |