EPM5192LC84-2 vs EPM5192LC-1 Perbandingan

Perbandingan bersamaan detil EPM5192LC84-2 dari Altera dan EPM5192LC-1 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EPM5192LC84-2 EPM5192LC-1
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family MAX 5000 MAX 5000
Device Type EPLD (UV-Erasable / OTP Complex PLD) EPLD / CPLD
Macrocells 192 192
Paket 84-pin PLCC (LC) —
Speed Grade -2 -1
Tegangan Pemuat 5 V (TTL-compatible I/O) 5 V nominal (4.75 V to 5.25 V)
Technology CMOS, UV-erasable / OTP CMOS, UV-erasable / OTP EPROM cell
Logic Elements AND-OR array with macrocell flip-flops —
Programming Method Altera legacy programmer (JEDEC bitstream) —
Suhu Kerja Commercial (0C to +70C) 0C to +70C (commercial)
Tipe Mounting Surface Mount —
Status RoHS Non-compliant (SnPb lead finish typical for this vintage) Non-compliant (ceramic LDCC with Pb-bearing terminations)
Status Lingkungan Hidup Obsolete (last Altera MAX 5000 production) —
JTAG Support Vendor-specific programming interface (pre-IEEE 1532) —
I/O Standard TTL, 5V CMOS-compatible —
Logic Gates — 3750 (typical usable)
Dedicated Inputs — 7
User I/O — 64
Jumlah Pin — 84
Package Type — LDCC (Leaded Ceramic Chip Carrier), plastic windowless
Propagation Delay — 25 ns
Frekuensi Bawah Maximum — 50 MHz
Programmable Memory — EPROM (one-time or UV-erasable)

Spek dan Sumber

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