EPM9320ALC84-15 vs EPM9320LC84-15 Perbandingan

Perbandingan bersamaan detil EPM9320ALC84-15 dari Altera dan EPM9320LC84-15 dari Intel. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EPM9320ALC84-15 EPM9320LC84-15
Merek Altera Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup NRND Obsolete
Family MAX 9000 CPLD MAX 9000
Macrocells 320 320
Usable Gates 6000 6,000
Propagation Delay (tPD) 16 ns 15 ns (max)
Supply Voltage (VCC) 4.75 V to 5.25 V (5 V nominal) 4.75 V to 5.25 V (5.0 V nominal)
User I/O 56 —
Logic Array Blocks (LABs) 16 20
Technology CMOS, EEPROM-based configuration CMOS EEPROM-based, third-generation Multiple Array MatriX (MAX)
Paket 84-pin PLCC (S-PQCC-J84, J-lead) 84-pin PLCC (Plastic Leaded Chip Carrier)
Tipe Mounting Through-hole / socket Surface Mount
Programming Interface JTAG (IEEE 1149.1) / ISP —
Suhu Kerja -40C to +85C (industrial) -40C to +85C (commercial) [DATA_NEEDED: exact grade]
Status RoHS [DATA_NEEDED: rohs status] [DATA_NEEDED: confirm from manufacturer]
Tingkat Sensitivitas Kekeringan (MSL) MSL-3 (168 hours per fpgalink.com) —
Lead-Free / Halogen-Free [DATA_NEEDED: lead free status] —
RoHS3 Compliance ROHS3 Compliant (per fpgalink.com listing) —
Series — EPM9320
Device Type — CPLD (Complex Programmable Logic Device)
Frekuensi Bawah Maximum — 117.6 MHz
Programmability — 5.0 V in-system programmable (ISP) via JTAG
JTAG Interface — IEEE Std. 1149.1 boundary-scan compliant
Built-in Pull-up Resistors — Yes, on every I/O pin
Architecture Feature — Pin-locking across design iterations

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