EPM9560RI208-20 vs EPM9560R1208-20 Perbandingan

Perbandingan bersamaan detil EPM9560RI208-20 dari Intel dan EPM9560R1208-20 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EPM9560RI208-20 EPM9560R1208-20
Merek Intel Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup NRND Obsolete
Family MAX 9000 MAX 9000
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Architecture Multiple Array MatriX (MAX) - third generation Multiple Array MatriX (MAX) with Logic Array Blocks (LABs) and Programmable Interconnect Array (PIA)
Usable Gates 12,000 6,000
Macro Cells 560 —
Logic Array Blocks (LABs) 16 —
Maximum User I/O Pins 212 —
Pin-to-Pin Propagation Delay (tPD) 20 ns —
Counter Frequency (fCNT) 100 MHz —
Supply Voltage (VCC) 5.0 V —
Process Technology CMOS EEPROM CMOS EEPROM, third-generation MAX architecture
In-System Programmability Yes (IEEE Std. 1149.1 JTAG) Yes (IEEE 1149.1 JTAG)
Paket 208-pin RQFP (Power-Quad Flat Pack) 28x28 mm R-1208 (BGA-style fine-pitch)
Suhu Kerja [DATA_NEEDED: operating temperature range grade] 0C to +70C (commercial)
Status RoHS [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: confirm via current distributor data]
Tipe Mounting Surface Mount Surface Mount
Macrocells — 560
Logic Array Blocks — 52 (typical for 560 macrocells)
Maximum User I/O — 212
Propagation Delay (tPD) — 20 ns
Maximum Frequency (fMAX) — 125 MHz
Supply Voltage (VCCINT/VCCIO) — 5.0 V
Technology — CMOS EEPROM
Boundary-Scan Test — JTAG IEEE Std. 1149.1
Configuration Memory — On-chip EEPROM (non-volatile)

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