EPM9560WC208 vs EPM9560RC208-10 Perbandingan

Perbandingan bersamaan detil EPM9560WC208 dari Altera dan EPM9560RC208-10 dari Intel. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EPM9560WC208 EPM9560RC208-10
Merek Altera Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup NRND Obsolete
Family MAX 9000 MAX 9000
Device Type EE Programmable Logic Device (CPLD) CPLD (Complex Programmable Logic Device)
Macrocells 560 560
Logic Array Blocks (LABs) 35 16
Flip-Flops 772 —
Maximum User I/O 149 —
Frekuensi Bawah Maximum 117.6 MHz —
Propagation Delay (tpd, -15 grade) 16.6 ns —
Tegangan Pemuat 3.3 V or 5 V —
Process Technology CMOS, electrically erasable 0.30 µm CMOS EEPROM
Paket 208-pin CQFP (Ceramic Quad Flat Pack) 208-pin RQFP (Plastic Quad Flat Pack)
Terminal Pitch 0.50 mm —
Tipe Mounting Surface Mount Surface Mount
Programming Interface IEEE 1149.1 JTAG —
Configuration Memory Non-volatile EE (instant-on) EEPROM (in-system programmable via JTAG)
Hot Socketing Support Yes —
Level MSL [DATA_NEEDED: MSL level] —
Status RoHS [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: not stated in retrieved distributor listings]
Maximum User I/O Pins — 212 (208-pin package variant)
Usable Gates — 12,000
Pin-to-Pin Delay (tPD) — 10 ns
Maximum Frequency (fMAX) — [DATA_NEEDED: internal toggle frequency in MHz]
Supply Voltage (VCCINT) — 5.0 V
I/O Standards Supported — 5.0 V TTL, 3.3 V LVTTL, 2.5 V (multiVolt I/O)
Suhu Kerja — 0C to +70C (commercial)
Lead-Free — [DATA_NEEDED: confirm lead-free status -10 suffix is conventional Pb-containing]
Programmability — JTAG (IEEE 1149.1) in-system programming

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