EP1M350F780I5 vs EP1M350F780C8 比較

詳細な並列比較: EP1M350F780I5 メーカー: Altera および EP1M350F780C8 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。

仕様比較

パラメータ EP1M350F780I5 EP1M350F780C8
ブランド Altera Altera
カテゴリ FPGA & CPLD FPGA & CPLD
ライフサイクル状態 NRND Obsolete
在庫状況 In Stock In Stock
単価(USD) $178.00 $175.00
Device Family Altera Mercury (EP1M) Enhanced Configuration Device Altera APEX Mercury (EP1M)
機能 FPGA configuration PROM with integrated controller —
Storage Density Code 350 (high-density) —
Supported Configuration Schemes Passive Serial, Active Serial, Fast Passive Parallel —
Internal Architecture Configuration controller + flash memory array —
Programming Method In-system programmable via Altera Quartus / JTAG —
パッケージ 780-ball FineLine BGA (F780) 780-ball FineLine BGA
Temperature Grade (suffix "I") Industrial —
Speed Grade 5 C8 (commercial, speed bin 8)
Target FPGA Compatibility Altera APEX 20K, APEX II, Mercury, Stratix-class high-density FPGAs —
JTAG Support Yes (IEEE 1149.1 boundary scan) —
Cascade / Multi-FPGA Support Yes, supports daisy-chained multi-FPGA boot —
Read-Back Yes —
RoHS ステータス [DATA_NEEDED: RoHS status] unknown (legacy device)
Lead-Free [DATA_NEEDED: lead-free status] —
Typical Gates — 350,000
Maximum Logic Elements (LEs) — 12,160
Embedded RAM Blocks — 4 dual-port RAM blocks
動作温度 — 0C to +85C (commercial)
Supply Voltage (Core) — [DATA_NEEDED: core Vcc]
I/O Standards Supported — LVTTL, LVCMOS, PCI, SSTL, LVDS (up to 20 standards)
Global Clock Networks — 8
Configuration Interface — IEEE 1532 / passive serial / JTAG
Maximum User I/O — [DATA_NEEDED: user I/O count]
In-System Programmability — Yes (ISP via JTAG)
実装タイプ — Surface Mount (BGA)
MSLレベル — [DATA_NEEDED: MSL rating]

データシート&リソース

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