EPC2TC32UCF48 vs EPC2TC32U 比較

詳細な並列比較: EPC2TC32UCF48 メーカー: Intel および EPC2TC32U メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。

仕様比較

パラメータ EPC2TC32UCF48 EPC2TC32U
ブランド Intel Altera
カテゴリ Memory ICs FPGA & CPLD
ライフサイクル状態 NRND NRND
在庫状況 In Stock In Stock
単価(USD) $10.85 $5.85
メモリタイプ Non-volatile configuration PROM (CMOS Flash-based) —
Memory Density 1.6 Mbit (1.6 Mb / 32 Mbit raw) —
Memory Configuration Serial configuration bitstream storage —
Supply Voltage (VCC) 3.0 V to 3.6 V (3.3 V typical) —
Supply Voltage (VCCIO) 1.8 V / 2.5 V / 3.3 V (bank-level) —
Output Drive Current (VCCIO) [DATA_NEEDED: IOH/IOL at 3.3 V VCCIO] —
Programming Interface IEEE Std. 1149.1 JTAG (in-system programmable) —
Configuration Interface Altera serial PROM interface (DCLK, DATA, nCONFIG, nSTATUS, CONF_DONE) Altera Passive Serial (DCLK / DATA0 / nCONFIG / nSTATUS / CONF_DONE)
Supported Configuration Modes FPP, AS, PS, JTAG (mode dependent on target FPGA MSEL pins) —
Daisy Chain Support Yes (multi-device cascade for >16 Mbit FPGAs) —
Maximum Cascaded Capacity Up to 16 Mbit total across chain —
動作温度 0C to +70C (commercial) -40 C to +85 C
パッケージ 48-pin TQFP (7x7 mm) 32-pin QFP (CAF48, lead-free)
実装タイプ Surface Mount Surface Mount
MSLレベル [DATA_NEEDED: MSL rating] [DATA_NEEDED: MSL level]
RoHS ステータス [DATA_NEEDED: confirm RoHS compliance] Compliant (lead-free / RoHS per distributor data)
Lead Free [DATA_NEEDED: confirm lead-free] —
機能 — Serial Configuration Device for SRAM-based LUT FPGAs
メモリサイズ — 1.6 Mbit
JTAG Support — Yes (IEEE 1149.1 boundary-scan, ISP)
電源電圧 — 3.0 V to 3.6 V or 4.75 V to 5.25 V
Lead-Free Finish — Yes (U suffix)
Supported FPGA Families — Altera Stratix, Cyclone, APEX, ACEX, Mercury, Excalibur
Configuration Mode — Passive Serial (PS), JTAG
Configuration Time — [DATA_NEEDED: typical configuration time]
Programming Cycles — [DATA_NEEDED: minimum program/erase cycles]
Data Retention — [DATA_NEEDED: minimum data retention years]

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